Hardware Accelerated Homomorphic Encryption Modular Multiplication

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Solution Overview

Problem

Homomorphic encryption technology requires significant computational resources, leading to slow operation processing speeds, which hinders its practical application.

Innovation Solution

A hardware-based parallel operation processing technique is introduced to accelerate arithmetic operations on homomorphically encrypted messages, utilizing modular multiplication methods such as Chinese Remainder Theorem (CRT) operations, Number Theoretic Transform (NTT) transformations, pointwise multiplication, and inverse operations to reduce processing time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If homomorphic encryption technology is used to perform operations on encrypted ciphertext, then data security is improved, but operation processing speed deteriorates

Engineering Contradiction:
Improvedata securityVSAvoidoperation processing speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent divides the large modulus into multiple smaller disjoint factors, allowing the ciphertext to be segmented and processed in parallel across multiple computational paths. This segmentation enables hardware-based parallel processing while maintaining the security properties of homomorphic encryption, thereby resolving the contradiction between security and processing speed.

Inventive Principle:
Principle #1Segmentation

2Productivity

If mathematical algorithms are used for arithmetic operations on polynomials, then computational efficiency is improved, but processing time still remains long

Engineering Contradiction:
Improvecomputational efficiencyVSAvoidprocessing time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent replaces software-based mathematical algorithms with hardware-based computational circuits. By implementing NTT transformation, pointwise multiplication, and inverse NTT transformation using dedicated hardware logic units, the system achieves parallel processing capability that dramatically reduces processing time while maintaining computational efficiency.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If homomorphic operation is performed on ciphertext without decryption, then data confidentiality is maintained, but operation complexity increases

Engineering Contradiction:
Improvedata confidentialityVSAvoidoperation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent transforms the ciphertext from polynomial coefficient representation to point-value representation through NTT transformation. This parameter change simplifies the multiplication operation to pointwise multiplication, reducing operational complexity while maintaining data confidentiality throughout the homomorphic encryption process.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12323507B2Method and apparatus for hardware-based accelerated arithmetic operation on homomorphically encrypted message
Publication Date: 2025.06.03 ELECTRONICS & TELECOMM RES INST
  • US12323507B2 patent drawing
  • US12323507B2 patent drawing
  • US12323507B2 patent drawing

AI summary

Provided are a method and apparatus for a hardware-based accelerated arithmetic operation on homomorphically encrypted messages. The method of performing hardware-based modular multiplication on homomorphically encrypted messages according to the present invention includes receiving a plurality of homomorphically encrypted messages expressed in a polynomial form and a modulus for modular multiplication, decomposing the modulus into a product of a plurality of disjoint factors through CRT operation, and extracting a divided ciphertext from a plurality of homomorphically encrypted messages based on each of the disjoint factors, performing NTT transformation on each coefficient of the divided ciphertext, performing a pointwise multiplication operation between result values of the NTT transformation, performing INTT transformation on a result value of the pointwise multiplication operation to obtain the divided ciphertext, and merging the divided ciphertext obtained in the performing of the INTT transformation through ICRT operation to generate an output ciphertext.