Vertical Memory Contact Layout for Uniform Bit-Line Characteristics
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As memory devices become more integrated and multifunctional, there is a need for improved electrical characteristics and higher integration levels, particularly in vertical memory devices where bit lines exhibit non-uniform electrical characteristics due to varying parasitic capacitances across channel structures.
Innovation Solution
A vertical memory device design featuring a honeycomb structure of channel structures with bit lines connected through contacts, where the layout of contacts in different sub-arrays is optimized to manage parasitic capacitances uniformly across bit lines, ensuring consistent electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory devices are made more integrated with higher capacity, then the integration level and capacity increase, but the electrical characteristics of bit lines become non-uniform due to varying parasitic capacitances
Solution Approach 1:
The patent applies local quality by differentiating contact layouts between first and second sub-arrays. Specifically, contacts in the first sub-array are arranged with different spacing patterns compared to contacts in the second sub-array, allowing each sub-array to have optimized local electrical characteristics that compensate for position-dependent parasitic capacitance variations across the integrated memory device.
Solution Approach 2:
The memory device is segmented into multiple sub-arrays (first sub-array and second sub-array) with distinct contact layouts. This segmentation allows independent optimization of electrical characteristics in different regions, addressing the non-uniformity issue that arises from high integration by treating different physical locations with different contact configurations.
2Quantity of substance
If bit lines are connected to multiple channel structures, then the capacity increases, but parasitic capacitances vary across bit lines causing non-uniform electrical characteristics
Solution Approach 1:
Different sub-arrays have locally optimized contact layouts tailored to their specific positions and channel structure configurations. The first sub-array uses a contact layout optimized for its particular set of channel structures, while the second sub-array uses a different layout optimized for its channel structures, ensuring uniform electrical characteristics across all bit lines despite connecting to multiple channel structures.
3Reliability
If contact layouts are optimized for uniform electrical characteristics, then bit line uniformity improves, but device complexity increases due to different layouts in different sub-arrays
Solution Approach 1:
The device is divided into sub-arrays with different contact layouts, which increases complexity. However, this segmentation is necessary to achieve uniform electrical characteristics across the entire device. The complexity is managed by systematically applying different predefined contact layout patterns to different sub-arrays based on their positions and channel structure configurations.
Data Source
AI summary
A vertical memory device includes a plurality of word lines on a substrate, a plurality of word line cut regions extending parallel to each other, a memory cell array comprising a plurality of channel structures extending on the substrate through the plurality of word lines and arranged in a honeycomb structure, a plurality of contacts on the plurality of channel structures, and a plurality of bit lines connected to the plurality of channel structures through the plurality of contacts. The memory cell array comprises a first sub-array and a second sub-array, which are defined by the plurality of word line cut regions and are connected to some identical bit lines from among the plurality of bit lines, and a layout of contacts in the first sub-array from among the plurality of contacts is different from a layout of contacts in the second sub-array from among the plurality of contacts.