Horizontal Compute Units and Vertical Cable Shuffles for High-Speed Data Transfer
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Solution Overview
Problem
Modern data centers face challenges in increasing compute power efficiently and controlling costs, particularly when handling large machine learning models that require lengthy and costly compute times.
Innovation Solution
A computing device assembly is provided, comprising a rack with horizontally oriented compute units in two vertical stacks, vertically oriented switches between the stacks, horizontal cable backplanes at the rear of the rack, and vertical cable shuffles for efficient cable routing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional data center hardware configurations are used, then deployment cost is reduced, but compute speed and data transfer rate are insufficient for large machine learning models
Solution Approach 1:
The system segments compute units into multiple horizontal units arranged in vertical stacks, with separate switch groups handling different routing functions. This segmentation allows parallel data paths and high-speed interconnects while maintaining modular scalability, resolving the contradiction between achieving high data transfer rates and managing hardware complexity.
Solution Approach 2:
The patent introduces a three-dimensional rack mounting configuration with compute units arranged in vertical stacks and switches positioned at intermediate vertical levels. This spatial dimensionality change enables shorter cable paths and higher data transfer rates without proportionally increasing overall system complexity.
2Productivity
If compute power is increased to handle large machine learning models, then model training capability is improved, but compute time and operational cost increase
Solution Approach 1:
The system enables continuous high-speed data transfer between compute units and switches through dedicated cable backplanes and optimized routing paths. This continuity eliminates data transfer bottlenecks, allowing compute units to maintain full utilization during model training operations, thereby improving productivity while reducing total compute time required.
Solution Approach 2:
Vertically oriented switches act as intermediaries between horizontal compute units, providing high-speed routing pathways that enable efficient data movement across the compute array. This intermediary architecture supports increased compute power utilization without proportionally increasing compute time.
3Power
If more compute units are deployed to increase processing power, then model training capability is improved, but hardware complexity and deployment cost increase
Solution Approach 1:
The rack configuration uses universal mounting standards and standardized cable backplanes that can accommodate multiple compute units of the same type. This universality allows compute power to be scaled by simply adding identical modular units rather than configuring complex heterogeneous systems, thereby increasing compute power while controlling hardware complexity.
Solution Approach 2:
Compute units are nested in vertical stacks within the rack structure, with multiple units occupying vertical space efficiently. This nesting approach increases compute power density without proportionally increasing the physical footprint or deployment complexity of the hardware system.
Data Source
AI summary
A computing device assembly is provided, including a rack, and a plurality of compute units that are horizontally oriented and mounted within the rack in one of two vertical stacks. The computing device assembly further includes a plurality of switches that are vertically oriented and mounted along a front side of the rack laterally between the two vertical stacks of compute units. The computing device assembly further includes a plurality of horizontal cable backplanes mounted in a vertical stack along a rear side of the rack. The computing device assembly further includes a plurality of vertical cable shuffles mounted between the two vertical stacks of compute units and between the vertically oriented switches and the vertical stack of horizontal cable backplanes.


