Horizontal Electric Field LCD Three-Mask Process
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Solution Overview
Problem
The manufacturing process of liquid crystal displays using horizontal electric fields is complex and costly due to the number of mask processes required, limiting further cost reduction and process simplification.
Innovation Solution
A liquid crystal display with a thin film transistor array substrate that employs a three-mask process, utilizing a double-layer conductive structure for the gate and data lines, and an etching preventive layer to reduce the complexity and cost by eliminating unnecessary mask steps and preventing substrate damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a conventional five-step mask process is used for manufacturing thin film transistor array substrate, then the manufacturing precision and reliability are maintained, but the device complexity and manufacturing cost increase significantly
Solution Approach 1:
The patent merges multiple mask processes into a single mask step by designing the gate line and data line patterns to be formed simultaneously. The gate line pattern and data line pattern are integrated into one photolithography process, eliminating the need for separate masking steps for each conductive layer, thus reducing process complexity while maintaining manufacturing precision
Solution Approach 2:
The single mask pattern serves multiple functions: it defines the gate line geometry, defines the data line geometry, and establishes the pixel electrode positions simultaneously. This multi-functional mask design reduces the number of mask processes required while ensuring all critical dimensions are controlled in one step
2Ease of manufacture
If the number of mask processes is reduced to lower manufacturing cost, then the ease of manufacture improves, but the manufacturing precision and yield may deteriorate
Solution Approach 1:
The patent performs preliminary design of the mask pattern to pre-determine all critical dimensions and alignments in a single exposure step. The mask is designed with built-in alignment features and optimized pattern geometry that ensures correct positioning of gate lines, data lines, and pixel electrodes without requiring subsequent alignment corrections, thereby maintaining reliability while reducing process steps
Solution Approach 2:
The patent optimizes the mask pattern parameters such as line widths, spacing, and alignment margins to compensate for potential variations in a single-step process. By carefully selecting and adjusting these parameters during design, the patent ensures that manufacturing yield is maintained even with reduced process complexity
3Reliability
If a double-layer conductive structure is used for gate and data lines, then the electrical performance is improved, but the device complexity increases
Solution Approach 1:
The patent combines the formation of the double-layer conductive structure into a single mask process. The gate line and data line patterns are created simultaneously in one photolithography step, eliminating the need for separate masking and etching steps for each conductive layer, thus maintaining electrical performance while reducing device complexity
Solution Approach 2:
The single mask pattern performs multiple functions: it defines both the gate line geometry and data line geometry, and establishes the pixel electrode positions. This multi-functional approach simplifies the overall device structure by integrating multiple conductive elements into one patterning operation
Data Source
AI summary
A liquid crystal display using horizontal electric field and a method of fabricating the liquid crystal display device that are capable of reducing the number of mask processes are provided.The liquid crystal display of horizontal electric field applying type has a thin film transistor array substrate, with a conductive film connected to a gate pad, s data pad and a common pad of a thin film transistor on the substrate. The pads are exposed on the thin film transistor array substrate.