Horizontal Gate-All-Around Transistor Fin Hole Fabrication
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Solution Overview
Problem
Current semiconductor structures for gate all around (GAA) transistors face challenges in achieving enhanced performance due to limitations in the fabrication process, particularly in forming a fin with a hole that requires precise and gradual formation to ensure smooth wall surfaces for optimal transistor performance.
Innovation Solution
A method involving the gradual formation of a hole in a fin, including steps such as forming a substrate, creating a fin with an oxide layer, defining grooves and hole-defining walls, and cleaning the native oxide layer, which allows for the enlargement of the hole and results in a smooth wall surface, enabling the formation of high-performance GAA transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a hole is formed in the fin using conventional methods, then the transistor structure is created, but the wall surface becomes rough which degrades transistor performance
Solution Approach 1:
The hole formation process is divided into multiple sequential steps: forming grooves on opposite sides of the fin, removing material between grooves to create initial holes, and iteratively repeating the groove formation and removal process. This segmented approach allows gradual enlargement of holes while maintaining smooth wall surfaces, preventing the roughness that would occur with single-step drilling or etching.
Solution Approach 2:
Grooves are formed on opposite sides of the fin before hole creation, serving as preliminary structures that define the future hole boundaries. These pre-formed grooves act as guides for subsequent material removal, ensuring that holes are created with smooth, controlled walls rather than rough surfaces from direct drilling or etching.
2Productivity
If the hole is formed quickly using direct drilling or etching, then productivity increases, but the wall surface becomes rough which harms transistor performance
Solution Approach 1:
The hole formation process uses continuous iterative cycles of groove formation and material removal, where each cycle progressively enlarges the hole while maintaining smooth walls. This continuous useful action replaces discontinuous, rapid drilling methods, ensuring that productivity gains do not compromise wall smoothness or transistor performance.
3Manufacturing precision
If multiple iterative steps are used to form the hole gradually, then wall surface smoothness is achieved, but the manufacturing process complexity increases
Solution Approach 1:
The fabrication process embeds multiple iterations of groove formation and material removal within each other, like nested dolls. Each groove formation step is nested within the previous structure, and each material removal step is nested within the groove definition. This nested structure organizes the complex multi-step process into a systematic, repeatable sequence that achieves smooth walls while managing process complexity through pattern repetition.
Data Source
AI summary
A semiconductor structure includes a substrate and a fin. The fin extends from the substrate and is formed with a hole therethrough. The hole is defined by a confronting pair of wall parts. One of the wall parts is more arcuate than the other of the wall parts. A method for fabricating the semiconductor structure is also disclosed.