Host Adapter Error Notification via SMI Interrupt and Shared Memory
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Solution Overview
Problem
Current error notification systems in storage subsystems are inefficient, leading to prolonged downtime due to a high timeout value of approximately 800 seconds, which is unacceptable as it results in prolonged I/O requests being held out, and there is a need to reduce this to less than 15 seconds to avoid loss of access on hung paths.
Innovation Solution
The implementation involves writing a defined value to a system management interrupt (SMI) register to generate a hardware interrupt, registering and handling this interrupt by a kernel module, and writing a second defined value to a shared memory location, allowing the host adapter to disconnect from the host when PCI mail communication is absent for a predetermined period.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the timeout value is set to approximately 800 seconds to allow normal recovery actions (failover/failback), then false triggers during recovery are avoided, but I/O requests are held out for too long causing unacceptable downtime
Solution Approach 1:
The patent implements preliminary action by writing an error notification value to shared memory before the timeout expires. When the server processor hangs or user mode process dies, the host adapter detects the absence of PCI mail communication and writes to shared memory location 0x30 immediately, triggering the kernel module to generate an SMI interrupt. This preliminary notification mechanism allows the system to respond to errors before the 800-second timeout would expire, reducing I/O hold time to less than 15 seconds while avoiding false triggers during normal recovery actions.
2Loss of time
If the timeout value is reduced to less than 15 seconds to reduce downtime, then I/O request hold time is minimized, but false triggers may occur during normal recovery actions like failover/failback
Solution Approach 1:
The patent implements feedback by establishing a communication loop between the host adapter and server processor through shared memory. The host adapter continuously monitors for PCI mail communication and writes to shared memory when communication is absent. The kernel module reads this shared memory location and generates appropriate SMI interrupts only when genuine errors are detected, not during normal recovery actions. This feedback mechanism enables the system to distinguish between actual errors and temporary communication gaps, reducing timeout to less than 15 seconds without causing false triggers.
Solution Approach 2:
The patent uses shared memory as an intermediary between the host adapter and the kernel module. Instead of directly timing out after 800 seconds or immediately disconnecting, the system uses shared memory writing as a mediator to signal error conditions. The host adapter writes to shared memory location 0x30 when it detects communication absence, and the kernel module reads this location to confirm the error condition before generating an SMI interrupt. This intermediary mechanism enables rapid response (less than 15 seconds) while maintaining reliability by confirming actual errors before triggering disconnection.
3Measurement precision
If the host adapter waits for confirmation of server processor hang or user mode process exit, then accurate error detection is achieved, but notification time is insufficient to disconnect from host in time
Solution Approach 1:
The patent applies preliminary action by having the host adapter write to shared memory immediately upon detecting the absence of PCI mail communication, without waiting for full confirmation of server processor hang or user mode process exit. This preliminary notification is then handled by the kernel module which generates the SMI interrupt. By acting preliminarily rather than waiting for complete confirmation, the system reduces notification time from 800 seconds to less than 15 seconds while maintaining accurate error detection through the shared memory confirmation mechanism.
Data Source
AI summary
A method of providing error notification in a storage subsystem includes writing a first defined value by a host adapter of the storage subsystem to a system management interrupt (SMI) register to generate a hardware interrupt, registering and handling the hardware interrupt by a kernel module of the storage subsystem, writing a second defined value to a shared memory location of the storage subsystem by the kernel module, and reading a shared memory offset value by the host adapter. A system for providing error notification in a storage subsystem includes a controller including a serial management interface (SMI) register subcomponent, a first processing component connected to the controller having a kernel module, and a second processing component connected to the controller executing host adapter software.