Host Adaptor Direct Flash Data Transfer via RDMA
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Solution Overview
Problem
Data storage arrays face performance limitations due to latencies associated with transferring data to global memory before it is provided to host adapters, even when using faster non-volatile memory devices like flash storage.
Innovation Solution
Implementing a system that utilizes a cache memory to transfer data from both fast and slow non-volatile memory to host adapters, allowing direct transfer from fast non-volatile memory to the host, and using RDMA for efficient data exchange between components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is transferred through global memory before reaching host adapters, then data storage array can use slower non-volatile memory devices, but data transfer latency increases
Solution Approach 1:
The patent segments the data transfer path into multiple independent routes: a fast direct path from non-volatile memory to host adapter, and a slower path through global memory. This allows the system to use slow non-volatile memory while providing a fast transfer path through segmentation of the data flow paths.
Solution Approach 2:
The host adapter acts as an intermediary that can directly access non-volatile memory without requiring data to pass through global memory first. This intermediary capability eliminates the latency bottleneck while maintaining the option to use global memory for other operations.
2Speed
If faster non-volatile memory devices like flash storage are used, then data access speed improves, but latency in transferring data to global memory before host adapters remains
Solution Approach 1:
The patent extracts the data transfer function from the global memory path by enabling direct access from non-volatile memory to host adapters. This removes the unnecessary intermediate step of transferring data to global memory before reaching the host adapter, eliminating the latency while preserving the speed benefits of fast non-volatile memory.
3Loss of time
If direct transfer path from non-volatile memory to host adapter is enabled, then data transfer latency is reduced, but device complexity increases
Solution Approach 1:
The patent implements a dynamic data transfer system where the host adapter can flexibly choose between direct access to non-volatile memory or transfer through global memory based on operational requirements. This dynamic capability allows the system to optimize performance while managing complexity through intelligent routing decisions.
Data Source
AI summary
Transferring data to an initiator includes providing a first target that exchanges commands and status with the initiator, providing a second target that exchanges commands and data with the first target and exchanges data with the initiator, the initiator providing a transfer command to the first target, the first target providing a transfer command to the second target, and in response to the transfer command received from the first target, the second target transferring data to the initiator. Data may be transferred to the initiator using RDMA. The second target may provide a status message to the first target indicating a result of transferring data. The first target may provide the status message to the initiator. The first target may be a host adaptor of a data storage array. The second target may be a flash memory. The initiator may be a host coupled to the data storage array.