Host-Aware Update Write Atomicity in Erasure Coded Storage

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Solution Overview

Problem

Software-defined storage systems implementing erasure coding for data protection face challenges in maintaining data integrity during update write operations, particularly in the absence of non-volatile storage, leading to increased I/O load and reduced throughput due to the need for write-ahead logging, which results in data integrity exposures and inefficiencies.

Innovation Solution

A host-aware update write protocol is implemented, which maintains mapping data between logical and physical addresses, allowing for atomic multi-device operations by tracking prior version copies and using a copy-on-write methodology to reduce write operations and ensure data integrity through prior version mapping information stored on the storage unit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If software-defined storage systems implement erasure coding for data protection, then data integrity is improved, but I/O load increases and throughput decreases due to write-ahead logging requirements

Engineering Contradiction:
Improvedata integrityVSAvoidthroughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the write-ahead logging function from the storage system architecture by implementing host-aware update writes that perform atomic multi-device operations directly. This eliminates the need for separate write-ahead log structures, removing the I/O overhead while maintaining data integrity through the host's responsibility to coordinate atomic updates across multiple devices.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies preliminary action by having the host system prepare and execute atomic update operations that simultaneously modify multiple storage devices. By performing the coordination and atomicity guarantees at the host level before writes occur, the system avoids the need for post-write verification and recovery mechanisms, reducing I/O load while ensuring data integrity.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If write-ahead logs are implemented for atomic read-modify-write operations, then data protection is improved, but I/O load increases and response time increases

Engineering Contradiction:
Improvedata protectionVSAvoidresponse time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges the write-ahead logging function with the host's update operation by implementing atomic multi-device writes at the host level. This consolidation eliminates the need for separate log write and recovery operations, reducing the number of I/O operations and response time while maintaining data protection through the atomicity guarantee provided by the host-aware protocol.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent enables self-service by making the host system responsible for coordinating atomic update operations across multiple storage devices. The host uses mapping data from the storage unit to identify current and prior physical addresses, then performs atomic updates without requiring the storage system to provide write-ahead logging services, thereby reducing system-level I/O load and response time.

Inventive Principle:
Principle #25Self-service

3Reliability

If additional storage devices are used for write-ahead logs, then data integrity is improved, but device complexity and I/O load increase

Engineering Contradiction:
Improvedata integrityVSAvoidstorage system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies universality by making the host system perform multiple functions: it manages data updates, coordinates atomic operations across multiple devices, and maintains awareness of storage mapping data. This multi-functionality at the host level replaces the need for dedicated write-ahead log storage devices, reducing device complexity while maintaining data integrity through the host's coordinated atomic updates.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent uses the host system as an intermediary that coordinates between the application layer and the storage system. The host uses mapping data from the storage unit to identify physical addresses and performs atomic updates, acting as a mediator that ensures data integrity without requiring additional storage devices for write-ahead logs, thereby reducing system complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If mapping data between logical and physical addresses is maintained, then atomic multi-device operations are enabled, but storage unit complexity increases

Engineering Contradiction:
ImproveatomicityVSAvoidstorage unit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies partial action by having the storage unit maintain only the essential mapping data between logical block addresses and physical block addresses needed for atomic operations, rather than maintaining complete metadata about all data operations. This selective maintenance of mapping information enables atomic multi-device operations while minimizing the complexity burden on the storage unit.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11099980B2Host aware update write
Publication Date: 2021.08.24 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11099980B2 patent drawing
  • US11099980B2 patent drawing
  • US11099980B2 patent drawing

AI summary

One embodiment provides a method comprising maintaining, on a storage unit, mapping data between a first set of logical addresses (e.g., logical block addresses or LBAs) viewed by a host and a first set of physical addresses (e.g., physical block addresses or PBAs) and a second set of physical addresses of the storage unit. A first logical address (e.g., LBA) of the first set of logical addresses corresponds to a first physical address (e.g., PBA) of the first set of physical addresses that maintains current data for the first logical address. The first logical address further corresponds to a second physical address (e.g., PBA) of the second set of physical addresses that maintains prior data for the first logical address. The method further comprises receiving, at the storage unit, a command from the host to perform a multi-device operation involving the first logical address. The operation is performed atomically.