Host Bridge Dynamic Bit Configuration for PCI Express
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods for PCI Express bus bit configuration are inflexible and inefficient, particularly in systems with limited pin count, leading to memory allocation fragmentation and inefficiencies in memory address allocation, which are not adequately addressed by existing technologies.
Innovation Solution
A method and apparatus for dynamically determining bit configuration for a host bridge by obtaining information about peripheral components, designating bit numbers for bus, device, and function number fields, and reserving a default configuration, allowing for flexible memory allocation and reduced pin requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If PCI Express bus adopts a 256 MB based memory address allocation, then memory address mapping is simplified, but memory allocation fragments occur and pin requirements increase
Solution Approach 1:
The patent applies dynamics by making the bit configuration dynamic rather than fixed. The host bridge dynamically determines bit configuration based on the actual number of peripheral components detected during system initialization. This allows the system to adapt the memory address allocation scheme to match the actual hardware requirements, reducing pin count while avoiding memory allocation fragments.
Solution Approach 2:
The patent changes the parameter of memory address allocation from a fixed 256 MB base to a flexible configuration based on detected peripheral components. By modifying the bit configuration parameters (such as bus number field, device number field, function number field widths) according to actual system needs, the patent reduces the required pin count while maintaining efficient memory allocation without fragments.
2Ease of manufacture
If PCI Express bus adopts a 256 MB based memory address allocation, then address mapping is straightforward, but system efficiency decreases due to memory allocation fragments
Solution Approach 1:
The patent makes the memory address allocation dynamic by detecting the actual number of peripheral components and configuring the bit structure accordingly. This dynamic approach eliminates memory allocation fragments while maintaining straightforward address mapping implementation, thereby improving system efficiency without sacrificing ease of manufacture.
Solution Approach 2:
The host bridge automatically detects the number of peripheral components and self-configures the appropriate bit configuration without external intervention. This self-service mechanism ensures optimal memory allocation that prevents fragments while maintaining simple address mapping, thus improving system efficiency while keeping the implementation straightforward.
3Device complexity
If fixed bit configuration is used for host bridge, then system design is simplified, but adaptability to different system configurations is reduced
Solution Approach 1:
The patent applies dynamics by enabling the host bridge to dynamically determine its bit configuration based on the detected number of peripheral components. This dynamic capability allows the same host bridge design to adapt to different system configurations (from single to multiple peripheral components) without requiring different hardware designs, thus maintaining design simplicity while maximizing adaptability.
Data Source
AI summary
A method for dynamically determining bit configuration for a host bridge. The method first obtains information of peripheral components coupled to the host bridge. Next, the method dynamically determines a bit configuration of a processor system bus connecting to the host bridge according to the obtained information.