Host Bridge DMA Stall Mechanism for Memory Migration
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Solution Overview
Problem
Existing data processing systems face challenges in efficiently migrating data subject to direct memory access (DMA) operations, particularly in systems that implement memory mapped I/O (MMIO) using split transactions, as stopping DMA can stall the processor and prevent MMIO load replies from completing.
Innovation Solution
A method and apparatus that stall DMA operations in a host bridge without stopping MMIO load operations, allowing data to be migrated from a source physical page to a destination while using a soft stop and hard stop state mechanism to manage DMA and MMIO traffic, ensuring that MMIO operations can continue and complete during the migration process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If DMA operations are stopped during memory migration, then data migration can be performed, but processor stalls occur and MMIO load replies cannot complete
Solution Approach 1:
The patent segments DMA operations into two types: DMA write operations and DMA read operations. It applies different stall policies to each type - stalling DMA writes while allowing DMA reads to continue. This segmentation resolves the contradiction by preventing unsafe writes during migration while maintaining productive read operations.
Solution Approach 2:
The patent applies local quality by treating different DMA operations differently based on their specific characteristics. DMA write operations are stalled to ensure data integrity during migration, while DMA read operations continue normally to maintain processor productivity. This differentiated local treatment resolves the contradiction between safety and productivity.
2Reliability
If DMA operations are stalled during memory migration, then data integrity is maintained, but MMIO load operations are blocked
Solution Approach 1:
The patent segments I/O operations into DMA operations and MMIO operations, applying different control policies to each. MMIO load operations are allowed to proceed during memory migration while DMA operations are stalled, maintaining both data integrity and MMIO continuity through this segmentation.
Solution Approach 2:
The host bridge acts as an intermediary device that selectively stalls DMA operations while allowing MMIO operations to pass through. This intermediary function resolves the contradiction by protecting data integrity during migration without blocking MMIO load operations that need to complete.
3Reliability
If the host bridge stalls all I/O operations during migration, then data migration is safe, but system responsiveness decreases
Solution Approach 1:
The patent segments I/O operations into DMA and MMIO types, applying selective stalling only to DMA write operations while allowing MMIO operations and DMA read operations to continue. This segmented approach maintains migration safety while preserving system responsiveness through continued operational capability.
Solution Approach 2:
The patent applies partial action by stalling only the specific subset of DMA write operations that pose a threat to data integrity during migration, rather than stalling all I/O operations. This partial stalling maintains migration safety while minimizing impact on system responsiveness.
Data Source
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AI summary
A computer-implemented method, apparatus, and computer program product are disclosed for migrating data from a source physical page to a destination physical page. A migration process is begun to migrate data from the source physical page to the destination physical page which causes a host bridge to enter a first state. The host bridge then suspends processing of direct memory access operations when the host bridge is in the first state. The data is migrated from the source physical page to the destination physical page while the host bridge is in the first state.