Host Buffer Command Protection During System Abnormality

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Solution Overview

Problem

Current memory storage apparatuses face data loss and system instability due to errors in the host memory buffer, leading to abnormal conditions when unexpected errors occur, such as abnormal restarts or power failures, which are not effectively managed by existing technologies.

Innovation Solution

A method for managing a host memory buffer that involves detecting system abnormalities, copying and initializing specific commands and data to a memory storage apparatus, and re-executing commands after initializing a part of the hardware circuit, while maintaining the integrity of the host system by avoiding data loss and ensuring no abnormality detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data in the host memory buffer is discarded when an error occurs, then system stability is ensured, but the host system detects abnormal conditions and operational efficiency decreases

Engineering Contradiction:
Improvesystem stabilityVSAvoidoperational efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by copying command data from the host memory buffer to the memory storage apparatus before a system abnormality occurs. The memory storage apparatus maintains a backup of command data in its own buffer, so when an error is detected in the host memory buffer, the system can immediately use the backup data without discarding it, thus maintaining both stability and efficiency

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements copying by creating a duplicate of the command data from the host memory buffer and storing it in the memory storage apparatus. This copy serves as a backup that can be used when the original data becomes corrupted, allowing the system to recover without losing operational efficiency while maintaining stability

Inventive Principle:
Principle #26Copying

2Reliability

If the entire hardware circuit is initialized in response to system abnormality, then data integrity is ensured, but command execution time increases and productivity decreases

Engineering Contradiction:
Improvedata integrityVSAvoidcommand execution time
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies segmentation by dividing the hardware circuit initialization into two parts: only the buffer memory is initialized, while other components such as the host interface and memory interface remain active. This selective initialization ensures data integrity in the buffer without requiring a complete system reset, thus reducing command execution time and maintaining productivity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements partial action by performing only the necessary initialization of the buffer memory component rather than initializing the entire hardware circuit. This partial initialization is sufficient to ensure data integrity while avoiding the excessive time cost of a full system reset

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11614997B2Memory storage apparatus with protection of command data in a host buffer in response to a system abnormality
Publication Date: 2023.03.28 PHISON ELECTRONICS
  • US11614997B2 patent drawing
  • US11614997B2 patent drawing
  • US11614997B2 patent drawing

AI summary

A method for managing a host memory buffer, a memory storage apparatus, and a memory control circuit unit are provided. The method includes: detecting whether a system abnormality occurs; copying a first command and first data corresponding to the first command stored in a data buffer of a host system to the memory storage apparatus in response to determining that the system abnormality occurs; executing an initial operation after copying the first command and the first data, wherein the initial operation initializes a part of a hardware circuit in the memory storage apparatus and does not initialize another part of the hardware circuit in the memory storage apparatus; and re-executing the first command stored in the memory storage apparatus after initializing the part of the hardware circuit.