Host Cache L2P Table Management for Multi-LUN Memory Systems
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Solution Overview
Problem
High-capacity storage systems face challenges in managing logical-to-physical address mappings due to cache sizing constraints, leading to potential memory shortages or underutilization in host systems managing multiple logical units (LUNs) of memory systems.
Innovation Solution
Implementing a host system cache configured for global management of logical-to-physical (L2P) tables, where each LUN shares a common page space, allowing for efficient mapping and recycling of cache pages to prevent memory shortages while avoiding unused memory spaces across LUNs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate L2P memory is allocated for each LUN, then each LUN has dedicated memory space, but the host system may run out of L2P memory for some LUNs while memory space for other LUNs remains unused
Solution Approach 1:
The patent merges separate L2P memory allocations for multiple LUNs into a single shared L2P memory pool. The host system's cache is configured as a common page space that stores L2P tables for all LUNs collectively, allowing dynamic allocation and recycling of cache pages across different LUNs based on demand rather than fixed separate allocations.
Solution Approach 2:
The host system cache is designed to serve multiple functions simultaneously: it acts as both the cache for host system operations and as the shared L2P memory for all LUNs. This universal cache structure allows the same memory resource to be dynamically utilized by any LUN that needs address translation, maximizing overall memory utilization while ensuring availability for all LUNs.
2Reliability
If host system cache size is increased to accommodate all L2P tables, then memory shortages are prevented, but unused memory spaces occur due to cache sizing constraints
Solution Approach 1:
The patent implements dynamic cache page management where the host system controller dynamically allocates and recycles cache pages based on actual L2P table access patterns. Cache pages are not statically assigned but are dynamically assigned to LUNs and L2P tables as needed, and recycled when no longer needed, allowing the cache to adapt its usage to changing memory demands without requiring oversized fixed allocation.
Solution Approach 2:
The system changes the parameter of cache allocation from fixed static size per LUN to dynamic shared allocation. The cache page space is managed as a pooled resource where the effective size allocated to each LUN changes dynamically based on current needs, allowing the total cache capacity to be fully utilized without creating unused memory spaces while preventing memory shortages.
Data Source
AI summary
Methods, systems, and devices for host side memory address management are described. In some examples, a host system may identify a read request that includes a logical address of a block of a memory device. The read request may be associated with a descriptor indicating a page of a cache of the host system. The host system may determine to assign a descriptor to a page of the cache, and may recycle one or more pages of the cache. In some examples, the host system may determine whether the page indicated by the descriptor includes a mapping between the logical address and a physical address of the memory device, and may issue a read command to the memory device based on the page including the mapping.