Host Command Execution Using RAM Address Overlap Search
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Solution Overview
Problem
Flash memory devices, particularly NAND flash devices, require sequential access and cannot directly access random addresses, leading to increased execution times for host commands due to temporary data storage in RAM being overwritten or not directly readable, necessitating a method to determine address overlaps for efficient data manipulation.
Innovation Solution
Implement a method involving a processing unit that sets registers, uses a sequential update queue with entries for logical address ranges, and a search engine to determine overlaps in RAM-stored data, allowing for efficient manipulation and reduction of execution times for host commands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is temporarily stored in RAM for subsequent operations, then data manipulation efficiency is improved, but execution time increases due to address overlap detection requirements
Solution Approach 1:
The system performs preliminary actions by setting up the sequential update queue and storing logical address ranges of temporarily stored data in advance. When a host command arrives, the search engine can immediately check for address overlaps without waiting for data processing to complete, enabling parallel operation and reducing execution time.
Solution Approach 2:
The search engine acts as an intermediary component that bridges the host command interface and the RAM storage system. It automatically detects address overlaps between host commands and temporarily stored data, allowing the system to manipulate RAM data directly without requiring full flash module access, thus improving efficiency while managing time constraints.
2Device complexity
If sequential access method is used for NAND flash, then device complexity is reduced, but execution time increases due to inability to access random addresses directly
Solution Approach 1:
The system segments the address space into logical address ranges that are stored in the sequential update queue. By dividing the large flash memory space into manageable logical blocks with defined start and end addresses, the search engine can efficiently detect overlaps without requiring complex random access mechanisms, maintaining device simplicity while improving execution speed.
Solution Approach 2:
The system creates a copy of the logical address range information in the sequential update queue, separate from the actual data storage. This copy allows the search engine to perform overlap detection operations without accessing the physical flash memory, eliminating the need for complex random access hardware while enabling fast address checking.
3Reliability
If full flash module access is performed for every host command, then data accuracy is ensured, but productivity decreases due to repeated access operations
Solution Approach 1:
The system extracts the address overlap detection function from the main host command execution path and places it in the dedicated search engine. This allows the system to take out only the necessary data from RAM when address overlaps are detected, rather than performing full flash module access for every command, thus maintaining data accuracy while improving productivity.
Solution Approach 2:
The system performs preliminary validation by storing logical address ranges in the sequential update queue before host commands are executed. This preliminary setup allows the system to quickly determine whether RAM data can be used directly or if flash access is needed, ensuring data accuracy through proper validation while avoiding unnecessary full access operations to improve productivity.
Data Source
AI summary
The invention relates to a method, a non-transitory computer-readable storage medium and an apparatus for executing host commands. The method performed by a processing unit includes: setting a first start register and a first end register to store a first logical address range from a first start logical address to a first end logical address for an execution of a host command; providing a sequential update queue including multiple entries; setting an activation register to drive a search engine; checking values of a matching register and a resulting address register of the search engine to determine whether a whole or a portion of data of the first logical address range is temporarily stored in the RAM after a time period; and if so, manipulating the whole or a portion of data of the first logical address range that is temporarily stored in the RAM.