Stacked Memory Host Scheduling for DRAM-SRAM Bandwidth
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Solution Overview
Problem
Memory bandwidth becomes a bottleneck to overall system performance improvements as advancements in processing speed lead to increased demands in memory devices, particularly in systems with stacked memory configurations.
Innovation Solution
Implementing a host device that issues commands to a storage device with a mix of volatile memory types, including DRAM and SRAM, and utilizing a memory map and latency information to sort and schedule commands, allowing intermixing of operations to maintain high data interface efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If processing speed is advanced, then system performance is improved, but memory bandwidth becomes a bottleneck
Solution Approach 1:
The memory system is segmented into multiple memory types (DRAM and SRAM) with different latency characteristics. The host device maintains a memory map that identifies which memory locations correspond to which memory type, allowing commands to be selectively issued to different memory types based on their latency profiles.
Solution Approach 2:
The host device preliminarily sorts and schedules pending commands based on latency information before issuing them to the memory device. This preliminary scheduling ensures that commands are issued in an optimal sequence that keeps the data interface busy and maximizes bandwidth utilization.
2Ease of operation
If commands are issued sequentially to memory devices, then command execution is simple, but data interface efficiency decreases
Solution Approach 1:
The command scheduling approach is dynamically adjusted based on the type of memory being accessed. The host device dynamically sorts and intermixes commands depending on whether they are directed to DRAM or SRAM, optimizing the command sequence to maintain high data interface efficiency while accounting for different memory latency characteristics.
Solution Approach 2:
The host device continuously issues commands to the memory device, keeping the data interface busy and maximizing utilization. By intermixing commands for different memory types based on their latency profiles, the system ensures that there are always commands being executed, eliminating idle periods on the data interface.
3Device complexity
If only one type of volatile memory is used, then memory management is simple, but bandwidth utilization is limited
Solution Approach 1:
The memory system incorporates multiple types of volatile memory (DRAM and SRAM) that can be accessed through a unified interface. The host device maintains a single memory map that encompasses both memory types, allowing the system to leverage the high capacity of DRAM and the low latency of SRAM through a single, versatile memory management approach.
Solution Approach 2:
The system changes the latency parameter by selecting different memory types for different commands. The host device uses latency information associated with each command to determine whether to issue the command to DRAM or SRAM, effectively changing the operational parameters of the memory system to optimize bandwidth utilization.
Data Source
AI summary
Techniques are provided for operating a memory package and more specifically to increasing bandwidth of a system having stacked memory. In an example, a system can include a storage device having a first type of volatile memory and a second type of volatile memory, and a host device coupled to the storage device. The host device can issue commands to the storage device to store and retrieve information of the system. The host device can include a memory map of the storage device and latency information associated with each command of the commands. The host can sort and schedule pending commands according to the latency information and can intermix commands for the first type of volatile memory and commands for the second type of volatile memory to maintain a high utilization or efficiency of a data interface between the host device and the storage device.