Host Controller Out-of-Band Interrupt Mapping for I3C Bus Efficiency
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Solution Overview
Problem
MIPI I3C bus interface struggles with integrating out-of-band interrupts from I2C devices, as they cannot generate in-band interrupts, leading to increased pin counts and signal paths, which hinders efficient communication and compatibility with I3C devices.
Innovation Solution
A host controller with processing and transmission circuitry identifies I2C out-of-band interrupts and generates corresponding I3C in-band interrupts, including source and data information, to enable I3C devices to consume interrupt content from I2C devices, thereby reducing additional traffic and maintaining bus efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If I2C devices use out-of-band interrupts (OBI) on GPIO pins, then interrupt functionality is achieved, but pin count and signal paths increase
Solution Approach 1:
The host controller acts as an intermediary that receives OBI from I2C devices on GPIO pins, processes the interrupt information, and generates corresponding IBI on the I3C bus. This mediator approach allows I2C devices to use simple GPIO interrupts while I3C devices receive standardized in-band interrupts, resolving the pin count issue without sacrificing interrupt functionality.
Solution Approach 2:
The host controller copies the interrupt information from the OBI signal on GPIO pins and reconstructs it as IBI on the I3C bus. By copying and transforming the interrupt data through the host controller, the system maintains interrupt functionality for I2C devices while presenting a unified I3C interface to I3C devices, thereby reducing the need for additional GPIO pins.
2Adaptability or versatility
If I2C devices cannot generate in-band interrupts (IBI), then I3C device compatibility is maintained, but additional signal paths are required
Solution Approach 1:
The host controller provides universal interrupt handling by supporting both I2C OBI and I3C IBI protocols. It functions as both an I2C slave that receives OBI and an I3C device that generates IBI, enabling a single controller to serve multiple protocol requirements and eliminate the need for separate interrupt paths for I2C and I3C devices.
Solution Approach 2:
The host controller serves as a mediator between I2C and I3C protocols. It receives interrupts from I2C devices via OBI, processes the information, and generates corresponding IBI for I3C devices. This intermediary function enables protocol translation that maintains I3C device compatibility while supporting I2C device interrupt capabilities without requiring additional signal paths.
3Reliability
If OBI is used for I2C devices, then interrupt capability is provided, but bus efficiency decreases due to additional traffic
Solution Approach 1:
The host controller merges the interrupt handling functionality into the I3C bus communication by converting OBI to IBI. Instead of maintaining separate OBI signal paths that would generate additional traffic, the interrupt information is merged into the existing I3C data stream, thereby maintaining interrupt capability while preserving bus efficiency through unified communication.
Data Source
AI summary
Embodiments of the present disclosure may relate to a host controller that includes processing circuitry to identify an inter-integrated circuit (I2C) out-of-band interrupt (OBI) received on a general purpose input-output (GPIO) pin from an I2C device that is unable to generate an improved inter-integrated circuit (I3C) bus an I3C in-band interrupt (IBI). The processing circuitry may further generate, based on the I2C OBI, an I3C IBI that includes information related to the I2C OBI. The host controller may further include transmission circuitry to transmit the I3C IBI on an I3C bus. Other embodiments may be described and/or claimed.