Host Controller TID Comparison for Memory Error Correction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory devices face challenges in accurately identifying and correcting transmission errors, particularly with transaction identification (TID) errors, which can lead to data corruption and require retransmission of commands.
Innovation Solution
A method where a host controller compares host TID records with memory device TID records to identify and correct transmission errors by re-sending commands with the correct TID, ensuring data integrity and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transmission errors are not corrected, then data transfer speed is maintained, but data integrity deteriorates
Solution Approach 1:
The patent applies preliminary action by implementing error detection and correction mechanisms before data transfer completes. The host controller detects transmission errors in received data and proactively requests retransmission of affected packets, preventing corrupted data from being processed further. This ensures data integrity is maintained without requiring complete retransmission of entire data sets.
Solution Approach 2:
The patent implements feedback through an error detection and retransmission request system. The host controller monitors incoming data for transmission errors, provides feedback about detected errors to the memory device, and triggers selective retransmission of only the affected data packets. This feedback loop maintains data integrity while minimizing impact on overall transfer speed.
2Reliability
If error detection and correction mechanisms are implemented, then data integrity is improved, but system complexity increases
Solution Approach 1:
The patent applies segmentation by dividing data into discrete packets, each with its own error detection code. This allows independent error detection and correction for each packet rather than requiring complex system-wide error handling. The host controller can identify and request retransmission of individual erroneous packets without affecting other data transfers.
Solution Approach 2:
The patent implements self-service through automated error detection and retransmission request mechanisms. The host controller automatically detects transmission errors in received data and generates retransmission requests without human intervention. The memory device automatically retransmits requested packets, eliminating the need for manual error correction procedures.
3Reliability
If retransmission requests are sent for erroneous data, then data accuracy is improved, but transmission time increases
Solution Approach 1:
The patent applies partial action by requesting retransmission of only the specific data packets that contain transmission errors, rather than retransmitting entire data sets or waiting for complete transfer completion. This selective retransmission approach minimizes the time loss associated with error correction while ensuring data accuracy is maintained.
Solution Approach 2:
The patent implements skipping by allowing the host controller to continue processing valid received data while simultaneously handling error correction for defective packets. Rather than pausing the entire data transfer process for error correction, the system rushes through valid data processing while selectively intervening to correct only erroneous portions.
Data Source
AI summary
The present disclosure includes apparatuses and methods related to transaction identification. An example apparatus can determine a transaction identification (TID) associated with a command by comparing a host transaction identification (TID) record with a memory device transaction identification (TID) record.