Host Debug Offloading via Peer-to-Peer Switching

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Solution Overview

Problem

Debugging and testing of PCIe and CXL devices often require heavy CPU usage and host intervention, leading to increased traffic and perturbation of normal system operation, which can impact the fidelity of testing and debugging processes.

Innovation Solution

A system is configured to perform debugging and testing without host intervention by using a switch to create a communication path between devices, allowing a first connected device to act as a controller for debug operations, thereby offloading these activities from the host processor, and utilizing secure communication protocols like SPDM for authentication and Vendor Defined Messages for message exchange.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If host processor is used to send debug messages and receive debug data, then debugging functionality is achieved, but CPU usage increases exponentially and system operation is perturbed

Engineering Contradiction:
Improvedebugging functionalityVSAvoidCPU processing capacity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the debugging function from the host processor and relocates it to a dedicated debug device. The host processor no longer sends or receives debug messages directly; instead, a separate debug device performs these operations, eliminating the exponential CPU usage increase while maintaining full debugging functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a dedicated debug device as an intermediary between the host system and the device under test. This intermediary handles all debug message transmission and data reception, allowing the host processor to focus on normal operations while the debug device manages debugging activities independently.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of information

If host processor is involved in constant monitoring for debugging, then debug information is captured, but traffic along functional paths increases and testing fidelity is adversely impacted

Engineering Contradiction:
Improvedebug information captureVSAvoidtesting fidelity
Core Design Contradiction:
Loss of informationVSReliability

Solution Approach 1:

The patent extracts the monitoring and debug information capture functions from the host processor's functional paths. A dedicated debug device performs constant monitoring independently, capturing debug information without injecting traffic into the functional paths that the host processor uses for normal operations, thereby preserving testing fidelity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent segments the system into distinct functional components: the host processor for normal operations and a separate debug device for monitoring and debugging. This segmentation allows debug information to be captured independently without contaminating the functional paths with additional debug traffic, maintaining the integrity and fidelity of both normal operations and testing.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20230129200A1System, apparatus and methods for offloading debug operations from host to peer
Publication Date: 2023.04.27 INTEL CORP
  • US20230129200A1 patent drawing
  • US20230129200A1 patent drawing
  • US20230129200A1 patent drawing

AI summary

In one embodiment, a host processor includes a configuration circuit that, in response to identification of a first device capable of debugging a second device, is to configure a switch to enable device-to-device messaging between the first device and the second device, the device-to-device messaging comprising at least one of debug messaging or test messaging to be communicated without host processor involvement. Other embodiments are described and claimed.