Host–Dopant Patterning Coating for Nucleation-Inhibited Deposition
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Solution Overview
Problem
Existing methods for patterning conductive materials in opto-electronic devices, such as OLEDs, face challenges with high evaporation temperatures affecting mask re-use and pattern accuracy, debris creation, and reduced applicability with complex topographies, impacting device performance and yield.
Innovation Solution
A patterning coating comprising a host and dopant material combination with distinct properties to control vapor deposition, acting as a nucleation-inhibiting coating (NIC) to facilitate precise patterning without debris, suitable for various topographies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a fine metal mask (FMM) is used during deposition, then patterning precision is improved, but mask re-use capability deteriorates due to high evaporation temperatures
Solution Approach 1:
The patent introduces an organic patterning coating as an intermediary layer between the substrate and the conductive material being deposited. This organic coating can be precisely patterned using shadow masks at lower temperatures, and the patterned organic layer then serves as the template for subsequent high-temperature conductive material deposition, eliminating the need for the metal mask to withstand high temperatures.
Solution Approach 2:
The patent changes the material parameter of the patterning coating from metal to organic material, which has lower evaporation temperature and different thermal stability characteristics. This parameter change allows the patterning step to occur at lower temperatures where organic materials are stable, while the subsequent conductive material deposition can proceed at high temperatures without affecting the patterned organic template.
2Manufacturing precision
If laser drilling is used to remove unwanted regions, then patterning is achieved, but debris creation increases affecting manufacturing yield
Solution Approach 1:
The patent performs preliminary patterning of the organic coating layer before depositing the conductive material. By pre-defining the pattern in the organic layer, the subsequent conductive material deposition naturally follows the pre-established pattern without requiring post-deposition removal steps that generate debris.
Solution Approach 2:
The patent converts the potential harm of organic material decomposition at high temperatures into a beneficial self-patterning mechanism. The organic material's selective decomposition or phase change at deposition temperatures creates the desired pattern automatically, eliminating the need for harmful laser drilling operations.
3Ease of manufacture
If conventional patterning methods are used, then simple topographies are handled, but applicability to complex topographies deteriorates
Solution Approach 1:
The patent creates a universal patterning approach where the organic coating layer can be deposited and patterned on any substrate topography using standard vacuum deposition techniques. The organic material conforms to complex three-dimensional surfaces, providing a versatile solution that works across simple and complex topographies without requiring topography-specific process modifications.
Solution Approach 2:
The patent uses a thin organic film that can flexibly conform to complex substrate topographies. This thin film approach allows the patterning coating to adapt to three-dimensional surfaces, recesses, and irregular features, providing uniform pattern quality across varied topographies that rigid masking methods cannot achieve.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables precise and efficient patterning of conductive materials in opto-electronic devices, enhancing device performance, stability, and reliability by minimizing debris and improving pattern accuracy.
Implementation Method 1
acting as a nucleation-inhibiting coating (NIC) to facilitate precise patterning
Implementation Method 2
adapted to impact a propensity of a vapor flux of a deposited material to be condensed thereon
Data Source
AI summary
A layered semiconductor device comprising a patterning coating deposited on an exposed layer surface of an underlying layer in a first portion of a lateral aspect is adapted to impact a propensity of a vapor flux of a deposited material to be condensed thereon, the patterning coating comprising a first and a second material exhibiting a respective first and second at least one material property. The patterning coating exhibits a third at least one material property that is different from at least one of the first and second at least one material property in terms of at least one of: a combination and a value thereof. The third at least one material property differentiates the exposed layer surface of the underlying layer from the exposed layer surface of the patterning coating.