Host-Driven Regional Caching in Non-Volatile Memory Storage

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Solution Overview

Problem

Current storage systems, such as those adhering to the NVMe specification, face inefficiencies in managing performance and endurance by not adequately accommodating control data behavior and garbage collection state, which hampers optimal mapping of high-performance regions to single-level cells (SLC) in memory.

Innovation Solution

The storage system modifies its caching policy and garbage collection policy based on host-directed logical regions, caching specific pages in volatile memory and optimizing garbage collection to prioritize host-preferred regions, thereby enhancing performance and resource utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the storage system uses a uniform caching policy for all logical regions, then the implementation is simple, but the performance for host-preferred logical regions cannot be optimized

Engineering Contradiction:
Improveperformance in host-preferred logical regionsVSAvoidcaching policy complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements regional caching policies that differentiate between host-preferred logical regions and other regions. The controller identifies logical regions through NVMe hints and applies customized caching strategies specifically to these regions, such as caching metadata and control data more aggressively in host-preferred regions compared to standard regions. This local differentiation optimizes performance where needed without unnecessarily complicating the entire caching system.

Inventive Principle:
Principle #3Local quality

2Productivity

If the storage system performs aggressive garbage collection to maintain performance, then write performance is improved, but host-preferred regions experience unnecessary data movement and reduced efficiency

Engineering Contradiction:
Improvewrite performanceVSAvoidenergy wasted in unnecessary garbage collection
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent implements region-specific garbage collection policies where host-preferred logical regions receive differentiated treatment. The controller identifies which logical regions are marked as host-preferred through NVMe hints and applies conservative garbage collection or exempts these regions from GC operations entirely, while still performing aggressive GC in non-host regions. This localized approach maintains write performance through targeted GC without wasting resources on unnecessary data movement in host-preferred regions.

Inventive Principle:
Principle #3Local quality

3Speed

If the storage system maps all logical regions to single-level cells (SLC) for high performance, then performance is improved, but the cost and power consumption increase significantly

Engineering Contradiction:
Improveaccess speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent implements a hybrid memory mapping strategy where only host-preferred logical regions are mapped to high-performance SLC memory, while other logical regions use standard multi-level cell (MLC) or triple-level cell (TLC) memory. The controller receives NVMe hints identifying host-preferred regions and dynamically configures the memory mapping accordingly. This localized high-performance mapping provides speed improvements where needed while significantly reducing the overall power consumption and cost compared to mapping the entire storage capacity to SLC.

Inventive Principle:
Principle #3Local quality

4Speed

If the storage system caches all pages of the logical-to-physical address map in volatile memory, then address translation performance is improved, but the volatile memory requirements and cost increase

Engineering Contradiction:
Improveaddress translation speedVSAvoidvolatile memory capacity
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The patent implements selective caching of the logical-to-physical (L2P) address map in volatile memory based on host preferences. The controller identifies which logical regions are marked as host-preferred through NVMe hints and caches only the L2P entries corresponding to these regions in volatile memory. Standard logical regions continue to use non-volatile memory for L2P storage. This selective caching approach improves address translation speed for host-preferred regions while significantly reducing the volatile memory capacity requirements compared to caching the entire L2P map.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11030106B2Storage system and method for enabling host-driven regional performance in memory
Publication Date: 2021.06.08 SANDISK TECHNOLOGIES LLC
  • US11030106B2 patent drawing
  • US11030106B2 patent drawing
  • US11030106B2 patent drawing

AI summary

A storage system and method for enabling host-driven regional performance in memory are provided. In one embodiment, a method is provided comprising receiving a directive from a host device as to a preferred logical region of a non-volatile memory in a storage system; and based on the directive, modifying a caching policy specifying which pages of a logical-to-physical address map stored in the non-volatile memory are to be cached in a volatile memory of the storage system. Other embodiments are provided, such as modifying a garbage collection policy of the storage system based on information from the host device regarding a preferred logical region of the memory.