Host-Based Error Correction for Memory Throughput and Accuracy

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Solution Overview

Problem

Existing memory devices face challenges in efficiently performing error correction due to limited processing resources and increased data storage demands, leading to reduced performance and potential data inaccuracies.

Innovation Solution

Implementing host-based error correction by transferring data from memory devices to a host computing system for error correction, utilizing specialized circuitry for initial and post-error correction operations, thereby reducing the processing load on memory devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction is performed on the memory device, then data accuracy is improved, but processing load and performance are reduced

Engineering Contradiction:
Improvedata accuracyVSAvoidperformance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the error correction function from the memory device and relocates it to the host system. The memory device only performs initial error correction with minimal processing, while the host performs post-error correction operations, thereby reducing the processing load on the memory device and improving overall performance while maintaining data accuracy.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The error correction process is segmented into two distinct stages: initial error correction performed by the memory device and post-error correction performed by the host. This segmentation allows each component to perform its specific function efficiently, with the memory device handling only essential corrections and the host handling more complex corrections, thus resolving the contradiction between reliability and productivity.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If more processing resources are allocated to error correction on memory devices, then error correction accuracy is improved, but device complexity increases

Engineering Contradiction:
Improveerror correction accuracyVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Complex post-error correction operations are extracted from the memory device and performed on the host system instead. This reduces the processing resources and complexity required in the memory device while maintaining high error correction accuracy through the host's more powerful processing capabilities.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If error correction operations are performed on the host system, then processing load on memory devices is reduced, but data transfer requirements increase

Engineering Contradiction:
Improveprocessing efficiencyVSAvoiddata transfer volume
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The memory device performs partial error correction (initial correction) before transferring data to the host, rather than performing complete error correction. This partial action reduces the processing load on the memory device and improves productivity, while the additional data transfer is offset by the host's superior processing capabilities.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12210411B2Host-based error correction
Publication Date: 2025.01.28 MICRON TECHNOLOGY INC
  • US12210411B2 patent drawing
  • US12210411B2 patent drawing
  • US12210411B2 patent drawing

AI summary

Systems, apparatuses, and methods related to host-based error correction are described. Error correction operations can be performed on a host computing system as opposed to on a memory system. For instance, data containing erroneous bits can be transferred from a memory system to a host computing system and error correction operations can be performed using circuitry resident on the host computing system. In an example, a method can include receiving, by a host computing system, data that comprises a plurality of uncorrected bits from a memory system coupleable to the host computing system, determining an acceptable error range for the data based at least in part on an application associated with the data, and performing, using error correction logic resident on the host computing system, an initial error correction operation on the data based at least in part on the acceptable error range.