Host-to-Flash Address Mapping Table Update via RAM Buffering

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing methods for updating host-to-flash address mapping tables in flash memory devices are inefficient, leading to performance delays and potential timeouts during host write commands due to the need to update multiple H2F sub-tables.

Innovation Solution

The method involves allocating space in RAM for a first H2F sub-table and intermediate information, updating these during host write or discard commands, and then programming the updated sub-tables into the flash module, allowing for efficient updating of the H2F table.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the H2F table is updated by programming multiple H2F sub-tables into the flash module during host write commands, then the address mapping is maintained, but the system performance deteriorates due to time-consuming sequential programming operations

Engineering Contradiction:
Improveaddress mapping accuracyVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent pre-allocates RAM space for H2F sub-tables and intermediate information before host write commands arrive. During command execution, updates are performed in RAM rather than directly in flash memory, preparing the data structure in advance for efficient batch programming.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces RAM as an intermediary buffer between the host controller and flash memory. The H2F sub-tables are first updated in RAM during host write commands, then programmed to flash memory in a separate batch operation, decoupling the update process from the command execution time.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If multiple H2F sub-tables are programmed sequentially into the flash module, then the complete address mapping is updated, but the update time increases causing timeouts

Engineering Contradiction:
Improvemapping completenessVSAvoidupdate time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges multiple individual H2F sub-table programming operations into a single batch programming operation. Instead of programming each sub-table separately during host write commands, all updated sub-tables are accumulated in RAM and programmed together in one operation, significantly reducing total update time.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system performs preliminary updates to H2F sub-tables in RAM during host write commands without immediately programming them to flash memory. This allows multiple sub-tables to be prepared in advance and programmed in a single batch operation, reducing the critical path time for address mapping updates.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If H2F sub-tables are updated directly in the flash module during host write commands, then the mapping is current, but the processing overhead increases

Engineering Contradiction:
Improvemapping currencyVSAvoidprocessing overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses RAM as an intermediary working space between the host controller and flash memory. H2F sub-table updates are performed in RAM during host write commands, leveraging RAM's fast random access capabilities to reduce processing overhead compared to direct flash memory updates.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the H2F table into multiple sub-tables that can be independently updated in RAM. This segmentation allows parallel processing of different sub-tables during host write commands, reducing the processing overhead compared to updating a single large table sequentially in flash memory.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12306765B2Method and non-transitory computer-readable storage medium and apparatus for updating host-to-flash address mapping table
Publication Date: 2025.05.20 SILICON MOTION INC
  • US12306765B2 patent drawing
  • US12306765B2 patent drawing
  • US12306765B2 patent drawing

AI summary

The invention relates to a method, a non-transitory computer-readable program product and an apparatus for updating a host-to-flash address mapping (H2F) table. The method includes: allocating space in a random access memory (RAM) for a first H2F sub-table and intermediate information, which is used to update a second H2F sub-table in a flash module; updating the first H2F sub-table and the intermediate information temporarily stored in the RAM during an execution of a host write command or a host discard command; and in a table update procedure, programming the first H2F sub-table temporarily stored in the RAM into a system block in the flash module, updating the second H2F sub-table according to the intermediate information stored in the RAM, and programming updated second H2F sub-table into the system block in the flash module.