Host-Guest Memory Mapping for Virtual Machine Data Latency

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Solution Overview

Problem

Deploying data-intensive distributed applications across clusters of virtual machines is impractical due to latency issues associated with feeding large data sets, as existing methods require multiple steps for data transfer from a source to the virtual machine, making it inefficient for big data jobs and resource-intensive tasks.

Innovation Solution

A system that maps a region in host memory to a region in guest memory, allowing direct data access and processing by guest elements within virtual machines, thereby eliminating unnecessary data transfer steps and enhancing data input/output operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional data transfer methods are used in virtualized environments, then data can be fed to virtual machines, but latency is high and data access speed is slow

Engineering Contradiction:
Improvedata access speedVSAvoiddata transfer latency
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent merges host memory and guest memory into a unified address space through memory mapping. The host memory region is mapped to the guest memory region, allowing guest elements to directly access data in host memory without traditional copy operations. This merging eliminates the intermediate data transfer steps that cause latency, directly resolving the contradiction between data access speed and transfer time.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a memory mapping mechanism as an intermediary between host memory and guest memory. This mapping layer allows direct address translation and access, serving as a mediator that eliminates the need for traditional data copying while maintaining virtualization isolation. The mapping intermediary enables fast direct access while preserving the virtualized environment structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If multiple data transfer steps are used from source to virtual machine, then data can be delivered, but the process becomes complex and inefficient

Engineering Contradiction:
Improvedata operation efficiencyVSAvoiddata transfer process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent combines multiple data transfer steps into a single direct access operation through memory mapping. Instead of copying data from source to host memory then to guest memory, the mapping allows guest elements to directly access source data in host memory, merging what were previously separate operations into one efficient step, thereby improving productivity and reducing complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent extracts the intermediate data copying steps from the traditional data transfer process. By removing the unnecessary copy operations and keeping only the essential access operation enabled by memory mapping, the system simplifies the data transfer process while maintaining functionality, directly addressing the complexity and efficiency contradiction.

Inventive Principle:
Principle #2Taking out (Extraction)

3Adaptability or versatility

If data-intensive distributed applications are deployed on virtual machines, then resource utilization increases, but latency prevents practical deployment

Engineering Contradiction:
Improvevirtualization capabilityVSAvoiddata feeding latency
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent merges host and guest memory spaces through mapping, enabling data-intensive applications to run on virtual machines with direct memory access. This merging eliminates the latency that previously prevented practical deployment of such applications on virtualized platforms, while preserving the adaptability and resource utilization benefits of virtualization.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10740148B2Accelerated data operations in virtual environments
Publication Date: 2020.08.11 HEWLETT PACKARD ENTERPRISE DEV LP
  • US10740148B2 patent drawing
  • US10740148B2 patent drawing
  • US10740148B2 patent drawing

AI summary

Systems, methods, and software described herein facilitate accelerated input and output operations with respect to virtualized environments. In an implementation, a computing system passes a process identifier to a kernel driver for a host environment, wherein the process identifier identifies a guest process spawned in a virtual machine and wherein the kernel driver uses the process identifier to determine an allocation of host memory corresponding to guest memory for the guest process and returns the allocation of host memory. Additionally, the computing system performs a mapping of the allocation of host memory to an allocation of guest memory for the guest element.