Host Interface Function Level Reset Management

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Solution Overview

Problem

Existing I/O virtualization technologies face challenges in efficiently managing function level resets (FLRs) across multiple processing elements, particularly in ensuring timely resource availability and preventing interference between shared I/O hardware resources.

Innovation Solution

The proposed solution involves a host interface with a control unit and application availability registers that manage function level resets by indicating resource unavailability, resetting configuration space registers, and reinitializing application hardware resources within specified time constraints, allowing concurrent non-blocking FLRs and ensuring transparent resource sharing among processors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If function level reset requests are processed sequentially to ensure proper resource reinitialization, then resource availability is guaranteed, but reset time exceeds specified constraints

Engineering Contradiction:
Improveresource availabilityVSAvoidreset time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the function level reset process by introducing application availability registers that track and manage reset states of individual functions independently. This allows the host interface to process multiple FLR requests by dividing them into separate function-specific reset operations, each tracked by its own availability register, enabling parallel processing while maintaining resource integrity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary action by setting the application availability register to indicate unavailability before the actual reset operation commences. This advance notification allows the processing element to prepare for the reset and understand the time constraints, enabling the host interface to prioritize and schedule reset operations to meet timing requirements while ensuring resources are properly reinitialized.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If multiple functions share I/O hardware resources to increase utilization, then resource efficiency improves, but interference between functions occurs during reset operations

Engineering Contradiction:
Improveresource utilizationVSAvoidfunction interference
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces application availability registers as intermediary components between the host interface and application hardware registers. These registers act as mediators that track the availability state of each function's resources, allowing the system to manage shared I/O hardware resources without interference. The intermediary provides a control mechanism that prevents one function from accessing another function's resources during reset operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies local quality by providing separate application availability registers for each function, allowing independent tracking and management of resource availability for each function. This localized control mechanism ensures that reset operations on one function do not interfere with other functions, while still allowing efficient sharing of underlying I/O hardware resources through the host interface.

Inventive Principle:
Principle #3Local quality

3Stability of the object's composition

If the host interface waits for complete hardware resource reinitialization before responding to FLR requests, then resource stability is ensured, but system responsiveness decreases

Engineering Contradiction:
Improveresource stabilityVSAvoidsystem responsiveness
Core Design Contradiction:
Stability of the object's compositionVSSpeed

Solution Approach 1:

The patent implements feedback by continuously monitoring the state of application hardware registers and updating the application availability registers accordingly. The host interface receives feedback about reset completion status and uses this information to determine when resources are stable and available. This feedback mechanism allows the system to respond quickly to FLR requests while ensuring resources are properly reinitialized before being made available again.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent uses preliminary action by proactively setting the application availability register to indicate unavailability when an FLR request is received, before the actual reset and reinitialization process completes. This allows the system to respond immediately to the FLR request while the reset operation proceeds, maintaining system responsiveness without compromising resource stability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8527745B2Input/output device including a host interface for processing function level reset requests and updating a timer value corresponding to a time until application hardware registers associated with the function level reset requests are available
Publication Date: 2013.09.03 ORACLE AMERICAN INC
  • US8527745B2 patent drawing
  • US8527745B2 patent drawing
  • US8527745B2 patent drawing

AI summary

An I/O device includes a host interface configured to process function level reset (FLR) requests in a specified amount of time. The host interface includes a control unit and groups of configuration space registers, each group corresponding to a function. The host interface also includes application availability registers, each associated with a respective function, and which may indicate whether application hardware within the respective function is available for access by a corresponding application device driver. The I/O device also includes application hardware resources associated with a respective function. In response to receiving an FLR request of a particular function, the control unit may cause the associated application availability register to indicate that the application hardware within the particular function is not available to the driver. The control unit may reset the corresponding configuration space registers within a predetermined amount of time and reset the associated application hardware resources.