Host Managed Buffer for SSD L2P Table Write Bandwidth
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Solution Overview
Problem
The existing Logical-to-Physical (L2P) address table in solid state drives (SSDs) requires significant volatile memory, leading to decreased write bandwidth due to the need for concurrent writes to both host and SSD memory, and the size of the table is proportional to the user-capacity of the SSD, necessitating increased memory allocation.
Innovation Solution
Storing a portion of the L2P indirection table in a host volatile memory buffer and using a write-back mode with flush checkpoints to lazily update the SSD, reducing the need for concurrent writes and increasing write bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the L2P address table is stored in volatile memory within the SSD, then random access speed is improved, but write bandwidth decreases due to concurrent write requirements
Solution Approach 1:
The L2P address table is segmented into two locations: a portion stored in volatile memory within the SSD for fast random access, and a portion stored in host volatile memory for write buffering. This segmentation allows read operations to access the SSD's volatile memory while write operations update the host's volatile memory, eliminating the write bandwidth bottleneck.
Solution Approach 2:
The host volatile memory buffer acts as an intermediary between the host controller and the SSD's non-volatile memory. Write operations are first directed to this intermediary buffer, allowing the SSD to continue processing write commands without waiting for volatile memory updates, thereby maintaining high write bandwidth.
2Adaptability or versatility
If the L2P address table size is increased to match user-capacity of the SSD, then address mapping coverage is improved, but memory allocation requirements increase
Solution Approach 1:
The patent merges the SSD's internal volatile memory with the host's volatile memory buffer to create a combined L2P address table storage system. This merging allows the system to leverage the host's typically larger memory resources, enabling full address mapping coverage for large-capacity SSDs without proportionally increasing the SSD's own memory allocation.
3Reliability
If concurrent writes to host and SSD volatile memory are required, then data consistency is maintained, but write operation complexity increases
Solution Approach 1:
The system performs preliminary actions by pre-allocating and initializing the host volatile memory buffer with the appropriate portion of the L2P address table before write operations begin. This preliminary setup establishes a clear write target in the host buffer, simplifying subsequent write operations and reducing the complexity of maintaining data consistency compared to simultaneous dual-memory updates.
Data Source
AI summary
Dirty Logical-to-Physical (L2P) entries in an L2P indirection table stored in a host volatile memory buffer are flushed to non-volatile memory in the solid state drive through the use of a write-back mode based on flush checkpoints. The use of write-back mode to flush dirty entries in the L2P indirection table to non-volatile memory in the solid state drive based on flush checkpoints results in an increase in the write bandwidth of the solid state drive.