Host-Managed NAND Memory Controller for Predictable SSD Latency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing flash memory systems face issues with unpredictable latency, excessive write amplification, and bandwidth competition due to memory management functions, which hinder their use in non-homogenous storage systems and network-based applications.
Innovation Solution
A cooperative memory management scheme where the host and memory controller interact to manage flash memory operations, with the controller storing subdivision-specific information and providing it to the host, allowing direct physical addressing and reducing the need for a flash translation layer (FTL).
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a flash translation layer (FTL) is used to manage flash memory operations, then wear leveling and space reclamation are improved, but write amplification increases and latency becomes unpredictable
Solution Approach 1:
The patent extracts the FTL from the memory controller and places it in the host system. This removes the source of unpredictable latency and write amplification from the storage device, allowing the host to manage flash operations with full knowledge of the flash memory characteristics and to optimize accordingly.
Solution Approach 2:
The patent introduces a new intermediary component called the flash management layer in the host system that acts as a mediator between the host OS and the memory controller. This layer handles address translation and flash management functions, enabling predictable performance while maintaining wear leveling and space reclamation capabilities.
2Reliability
If memory management functions are implemented in the memory controller, then wear leveling and garbage collection are improved, but control and data bandwidth are reduced
Solution Approach 1:
The patent extracts memory management functions from the memory controller and relocates them to the host system. This extraction eliminates the bandwidth consumption caused by these management operations, allowing full utilization of the available control and data bandwidth for actual storage operations.
3Ease of operation
If a flash translation layer is used to hide flash memory characteristics, then ease of operation is improved, but device complexity increases
Solution Approach 1:
The patent extracts the FTL functionality from the memory controller and places it in the host system. This reduces the complexity of the memory controller while maintaining the ease of operation for the host, as the flash management layer in the host provides the necessary abstraction.
4Productivity
If erase units are made large to improve programming efficiency, then programming speed is improved, but space utilization deteriorates due to P/E asymmetry
Solution Approach 1:
The patent enables dynamic management of flash space by allowing the host to track and manage the state of individual pages within erase units. This dynamic approach allows the system to optimize space utilization by identifying and erasing only the portions of erase units that are no longer needed, rather than erasing entire large erase units.
Data Source
AI summary
This disclosure provides for host-controller cooperation in managing NAND flash memory. The controller maintains information for each erase unit which tracks memory usage. This information assists the host in making decisions about specific operations, for example, initiating garbage collection, space reclamation, wear leveling or other operations. For example, metadata can be provided to the host identifying whether each page of an erase unit has been released, and the host can specifically then command each of consolidation and erase using direct addressing. By redefining host-controller responsibilities in this manner, much of the overhead association with FTL functions can be substantially removed from the memory controller, with the host directly specifying physical addresses. This reduces performance unpredictability and overhead, thereby facilitating integration of solid state drives (SSDs) with other forms of storage. The disclosed techniques are especially useful for direct-attached and/or network-attached storage.