Host-Managed Storage Mapping Without Flash Translation Layer

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional storage systems rely on controllers to manage data storage operations, which may lead to delays when host-initiated operations are not timely performed by the controller due to ongoing tasks.

Innovation Solution

The host actively participates in managing data storage by directly controlling physical data locations through a host-initiated mapping mechanism, eliminating the need for a flash translation layer and enabling direct management of logical to physical address mapping.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the controller manages data storage operations autonomously, then data storage reliability is improved, but operation timeliness deteriorates due to delays when the host's operations are not timely performed

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidoperation timeliness
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent introduces a host-initiated mapping mechanism as an intermediary between the host and storage device. The host directly manages logical-to-physical address mapping and initiates data placement operations, eliminating the need for the controller to autonomously manage data storage. This intermediary mechanism allows the host to directly control data storage operations, improving timeliness while maintaining reliability through direct host management.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the controller autonomously manages data storage, then data storage reliability is improved, but device complexity increases due to the need for a flash translation layer

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidcontroller complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the address mapping and data management functions from the controller and relocates them to the host. By removing the flash translation layer and controller-managed mapping mechanisms, the controller's complexity is reduced while the host assumes responsibility for managing logical-to-physical address mapping and initiating data storage operations.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The host-initiated mapping mechanism serves as an intermediary that eliminates the need for a complex flash translation layer in the controller. The host directly manages address mapping and communicates data placement requirements to the storage device, simplifying the controller's architecture while maintaining reliable data storage through direct host control.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of time

If the host actively manages physical data locations, then operation timeliness is improved, but ease of operation deteriorates due to increased host management responsibilities

Engineering Contradiction:
Improveoperation timelinessVSAvoidhost management complexity
Core Design Contradiction:
Loss of timeVSEase of operation

Solution Approach 1:

The host-initiated mapping mechanism provides an intermediary framework that enables timely host control over data storage while abstracting the complexity of physical location management. The host manages logical-to-physical address mapping and initiates data placement operations through a standardized interface, improving timeliness without overwhelming the host with low-level storage device complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250355577A1Storage system having a host that manages physical data locations of a storage device
Publication Date: 2025.11.20 KIOXIA CORP
  • US20250355577A1 patent drawing
  • US20250355577A1 patent drawing
  • US20250355577A1 patent drawing

AI summary

A memory system includes an interface circuit configured to connect to a host device, a controller electrically connected to the interface circuit, and a nonvolatile semiconductor memory electrically connected to the controller. The controller is configured to transmit a first response in response to a power supplied from the host device via the interface circuit, upon receipt of a first command from the host device after transmitting the first response, determine a status of data stored in the nonvolatile semiconductor memory, and transmit to the host device a second response including the determined status of the data stored in the nonvolatile semiconductor memory.