Host Memory Buffer Allocation for Sustained Sequential Writes

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Solution Overview

Problem

Storage devices face challenges in maintaining pace with sustained write sequences due to limited capacity and high cost of SRAM, especially during tasks like folding or compaction, which degrades sequential write performance.

Innovation Solution

The implementation of a data storage apparatus that includes a non-volatile memory and a controller, which allocates host memory buffers on the host device for relocation data, allowing the controller to manage and write data efficiently, thereby optimizing SRAM usage and enabling parallel operations during sustained writes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If SRAM is used for data accumulation during sustained writes, then write speed is improved, but cost and capacity are limited

Engineering Contradiction:
Improvewrite speedVSAvoidSRAM capacity
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The patent introduces host memory buffers (HMBs) as an intermediary storage mechanism between the host device and the storage device's SRAM. The HMBs are allocated on the host device's memory, allowing relocation data to be stored externally during sustained write operations. This mediator approach enables the SRAM to be freed for other operations while maintaining continuous data accumulation capability, thus resolving the capacity limitation of SRAM without sacrificing write speed.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If SRAM capacity is increased to handle sustained writes, then write performance is improved, but cost increases

Engineering Contradiction:
Improvesustained write performanceVSAvoidmanufacturing cost
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent employs a copying strategy by creating virtual copies of the SRAM buffer capacity on the host device through memory mapping. Instead of physically increasing SRAM capacity on the storage device, the system creates a virtual extension of the buffer using the host's memory resources. This allows sustained write performance to be improved without the actual hardware cost of larger SRAM, as the additional capacity is simulated through software/memory management rather than physical component expansion.

Inventive Principle:
Principle #26Copying

3Reliability

If relocation data is stored in SRAM for folding or compaction, then storage device robustness is improved, but sequential write performance degrades

Engineering Contradiction:
Improvestorage device robustnessVSAvoidsequential write performance
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent segments the data handling process into distinct phases and locations: host memory buffers are used for storing relocation data during folding/compaction operations, while SRAM is dedicated to data accumulation during sustained writes. By segmenting these functions across different memory resources, the system allows folding/compaction to proceed without blocking sustained write operations, thus maintaining both robustness and sequential write performance simultaneously.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12182441B2Allocation of host memory buffer for sustained sequential writes
Publication Date: 2024.12.31 SANDISK TECHNOLOGIES LLC
  • US12182441B2 patent drawing
  • US12182441B2 patent drawing
  • US12182441B2 patent drawing

AI summary

Aspects of a storage device for providing superior sustained sequential write (SSW) performance are disclosed. A controller on the storage device allocates buffer space in the host memory buffers (HMBs) on the host device for storage of relocation data, i.e., data to be folded or compacted. The controller or a hardware element therein can therefore allocate local SRAM (including TRAM) for use in accommodating incoming host writes. The increased SRAM allocation of relocation data without an attendant increase in cost or size to the storage device enables the storage device to perform operations in parallel and substantially increase SSW performance metrics.