Host Memory Buffer Data Storage for Controller Performance

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Solution Overview

Problem

Storage controllers face performance issues due to buffer fullness and mismatched data exchange rates between storage systems and host devices, leading to inefficiencies in I/O operations.

Innovation Solution

Implementing a host memory buffer (HMB) system that includes a non-volatile memory and a controller to temporarily store data until a trigger event, allowing for dynamic buffering and data transfer management between the host device and storage system.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is buffered in the storage controller buffer, then data transfer between host and storage system can be managed, but the buffer may become full or nearly full causing performance degradation

Engineering Contradiction:

Improvestorage controller performanceVSAvoidbuffer fullness

Core Design Contradiction:

ProductivityVSQuantity of substance

Solution Approach 1:

The patent extends the buffering capability from the storage controller buffer to the host memory buffer, effectively adding another dimension to the data buffering architecture. This allows data to be buffered in two locations (storage controller buffer and host memory buffer), preventing the storage controller buffer from becoming full and causing performance degradation while maintaining data transfer management

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Productivity

If data exchange rates between storage system and host device are mismatched, then buffering must be managed, but performance is adversely affected due to speed differences

Engineering Contradiction:

Improvedata exchange efficiencyVSAvoiddata transfer rate mismatch

Core Design Contradiction:

ProductivityVSSpeed

Solution Approach 1:

The host memory buffer acts as an intermediary between the storage system and the host device, absorbing the speed differences between them. By providing this intermediate buffering layer, the system can manage data exchange rates effectively without the performance penalties that would result from direct connection with mismatched speeds

Inventive Principle:

Principle #24Intermediary (Mediator)

3Adaptability or versatility

If buffer size is increased to handle data rate mismatches, then data transfer management improves, but device complexity increases

Engineering Contradiction:

Improvedata rate adaptationVSAvoidbuffer management complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The host memory buffer leverages the host device's existing memory resources rather than requiring additional dedicated buffer memory in the storage controller. This self-service approach allows the system to adapt to different data rates using available host memory, improving adaptability without significantly increasing device complexity

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS10635580B2Buffering storage device data in a host memory buffer

Publication Date: 2020.04.28 SANDISK TECHNOLOGIES LLC

AI summary

Apparatus, systems, methods, and computer program products for buffering storage device data in a host memory buffer (HMB) are presented. A non-volatile memory and a controller are in communication with a non-volatile memory. A controller is configured to receive an input/output (I/O) operation including data. A controller is configured to transmit at least a portion of data to an HMB of a host device separate from a non-volatile memory and a controller for storage until a trigger event occurs.