Host-Side Memory Cryptography Using Register-Based Key Instructions
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Solution Overview
Problem
Existing memory systems lack secure data transmission protocols, particularly in high-security applications, as data communicated between host and memory systems is often unencrypted, exposing sensitive information to unauthorized access.
Innovation Solution
Implementing host-side cryptography by using a cryptography engine at the host system to encrypt and decrypt data through a set of registers, where a pointer indicates the appropriate cryptography instructions for each data set, ensuring secure communication via interface protocols.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data is transmitted unencrypted between host and memory system, then communication speed and simplicity are improved, but security and data protection deteriorate
Solution Approach 1:
The patent implements host-side cryptography that encrypts data before it is transmitted to the memory system. The cryptography engine at the host system encrypts data using cryptography instructions stored in registers, so that encrypted data is written to the memory system. This preliminary encryption action ensures data security while maintaining the existing communication interface and speed characteristics.
2Reliability
If host-side cryptography is implemented, then data security is improved, but device complexity increases
Solution Approach 1:
The patent implements a cryptography engine at the host system that autonomously performs encryption and decryption operations. The engine retrieves cryptography instructions from registers, executes them to encrypt/decrypt data, and manages the entire cryptography process without requiring memory system involvement. This self-service approach confines complexity to the host side while keeping the memory system simple.
Solution Approach 2:
The patent segments the cryptography function into separate cryptography instructions stored in registers, which are executed by a dedicated cryptography engine. This segmentation allows the cryptography operations to be performed independently from the main memory operations, isolating the complexity to a specific module while maintaining overall system functionality.
3Adaptability or versatility
If cryptography instructions are stored in registers with pointer indication, then adaptability and versatility are improved, but device complexity increases
Solution Approach 1:
The patent implements a universal cryptography engine that can execute multiple different cryptography instructions stored in registers. The same engine and register structure can handle various encryption and decryption algorithms by simply loading different instruction sets into the registers. This multi-functionality provides adaptability for different cryptography needs while using a single unified hardware structure.
Data Source
AI summary
Methods, systems, and devices for host-side cryptography for a memory system are described. A memory system may receive, a command for a set of data, and an address payload comprising an indication of a register, of a host system, that stores cryptography instructions for the set of data. The memory system may transmit, to a cryptography engine of the host system, an indication of the command for the set of data, and the address payload comprising the indication of the register that stores the cryptography instructions. The memory system may communicate, between the memory system and the host system, the set of data based at least in part on transmitting the indication of the command and the address payload comprising the indication of the register that stores the cryptography instructions, where the set of data is encrypted according to the cryptography instructions.