Host Panic Register Control for Preserving Device Context

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Solution Overview

Problem

Existing computing systems fail to effectively manage host critical failure events, leading to loss of device context information during system crashes, which complicates failure analysis and increases support turnaround time and costs for OEMs and device vendors.

Innovation Solution

Implementing a host panic control register and I/O read/write commands to detect and manage host critical failure events, ensuring device context information is preserved and accessible for post-processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the operating system resets the system and device after a host failure event, then the system can recover and continue operation, but the device context information is lost due to the device reset

Engineering Contradiction:
Improvesystem recoveryVSAvoiddevice context information
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent applies preliminary action by setting a panic bit in the device before the host failure occurs. This panic bit serves as a pre-configured marker that triggers the preservation of device context information when a host failure is detected, ensuring the information is captured before the device reset that would otherwise cause loss of this critical data

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses an intermediary mechanism (the panic bit and associated firmware logic) that mediates between the host failure event and the device reset process. This intermediary triggers the capture and preservation of device context information, acting as a bridge that allows information to be saved despite the necessary system recovery reset

Inventive Principle:
Principle #24Intermediary (Mediator)

2Difficulty of detecting and measuring

If extensive reproduction of failure analysis is performed by suppliers, then failure events can be analyzed, but the turnaround time for support increases and Quality of Service deteriorates

Engineering Contradiction:
Improvefailure analysis capabilityVSAvoidsupport turnaround time
Core Design Contradiction:
Difficulty of detecting and measuringVSLoss of time

Solution Approach 1:

The patent applies preliminary action by capturing and preserving device context information at the moment of host failure through the panic bit mechanism. This preliminary capture eliminates the need for extensive later reproduction efforts, as the critical information is already available for immediate analysis, significantly reducing support turnaround time

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system performs self-service by automatically capturing and preserving device context information when a host failure occurs. This automated process eliminates the need for manual reproduction efforts by suppliers, allowing failure analysis to proceed directly with the preserved information and reducing both time and resource requirements

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20260056822A1Methods and systems for managing host critical failure events
Publication Date: 2026.02.26 SAMSUNG ELECTRONICS CO LTD
  • US20260056822A1 patent drawing
  • US20260056822A1 patent drawing
  • US20260056822A1 patent drawing

AI summary

A method for managing a failure condition at a host includes detecting an occurrence of a host critical failure event at the host, configuring at least one panic bit of a host panic control register of a device, based on the detecting of the occurrence of the host critical failure event, and issuing, to the device, at least one input/output (I/O) read/write command.