Host Polling Of A Network Adapter For Low-Latency Data Retrieval

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Solution Overview

Problem

Current network adapter data transfer methods, particularly in the receive direction, result in high latency due to packets being stored in main memory instead of the CPU cache, leading to inefficient data retrieval for low-latency applications.

Innovation Solution

Implementing host CPU polling of the network adapter to store received data in CPU registers or cache, delaying responses if the packet has not arrived, and using a combination of CPU polling and DMA for data transfer to reduce latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Extent of automation

If DMA is used to move data from network adapter to host memory, then data transfer automation is improved, but data retrieval latency increases due to storage in main memory instead of CPU cache

Engineering Contradiction:

Improvedata transfer automationVSAvoiddata retrieval latency

Core Design Contradiction:

Extent of automationVSLoss of time

Solution Approach 1:

The patent introduces CPU polling as an intermediary mechanism between the network adapter and host memory. Instead of direct DMA transfer to main memory, the CPU actively polls the network adapter to retrieve packets, which then allows data to be placed in CPU cache rather than main memory, reducing retrieval latency while maintaining automated transfer through the polling mechanism

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements preliminary action by having the CPU poll the network adapter in advance before the application needs the data. This proactive retrieval allows packets to be fetched and stored in CPU cache beforehand, so when the application requests the data, it is already available in fast cache memory rather than requiring a slow main memory access

Inventive Principle:

Principle #10Preliminary action

2Speed

If host CPU polls network adapter continuously to check for packets, then data retrieval speed is improved, but CPU idle time increases and processing efficiency decreases

Engineering Contradiction:

Improvedata retrieval speedVSAvoidCPU processing efficiency

Core Design Contradiction:

SpeedVSProductivity

Solution Approach 1:

The patent applies periodic action by implementing scheduled or interval-based polling of the network adapter instead of continuous polling. The CPU checks for packets at predetermined intervals, allowing it to perform other processing tasks between polls. This maintains data retrieval capability while reducing CPU idle time and improving overall processing efficiency

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The patent uses feedback mechanisms where the network adapter provides status information to the CPU about packet availability. The CPU adjusts its polling behavior based on this feedback - polling more frequently when packets are expected and less frequently when the adapter is idle, thereby optimizing both retrieval speed and CPU efficiency dynamically

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS20250330410A1Host polling of a network adapter

Publication Date: 2025.10.23 XILINX INC

AI summary

Embodiments herein describe a host that polls a network adapter to receive data from a network. That is, the host/CPU/application thread polls the network adapter (e.g., the network card, NIC, or SmartNIC) to determine whether a packet has been received. If so, the host informs the network adapter to store the packet (or a portion of the packet) in a CPU register. If the requested data has not yet been received by the network adapter from the network, the network adapter can delay the responding to the request to provide extra time for the adapter to receive the data from the network.