Host Power Controller Bypasses BIOS for NVMe Storage Safety
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Solution Overview
Problem
NVMe storage devices experience unsafe shutdowns due to premature power cutoff by the BIOS controller, leading to frequent power cycling and data integrity issues.
Innovation Solution
A separate power controller is configured in the host system to control the power gate, ensuring power is cut off only after the memory storage device has completed its shutdown operations and restored only after a valid wake-up command is detected, thereby bypassing the BIOS controller's control over the power gate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the BIOS controller controls the power gate to cut off power to the memory storage device, then power consumption is reduced, but unsafe shutdowns and data integrity issues occur
Solution Approach 1:
The patent introduces a separate power controller as an intermediary component between the BIOS controller and the power gate. This power controller receives shutdown commands from the storage controller, coordinates the shutdown sequence, and controls the power gate accordingly. The intermediary ensures that power is cut off only after the storage device has safely completed its shutdown operations, preventing unsafe shutdowns while maintaining power management efficiency
Solution Approach 2:
The patent segments the power control function from the BIOS controller and assigns it to a dedicated power controller. This separation of functions allows the power control logic to be independently optimized - the power controller can monitor storage device status and coordinate shutdown sequences without being constrained by the BIOS controller's other responsibilities, thus preventing unsafe shutdowns while maintaining overall system power efficiency
2Speed
If the BIOS controller frequently powers off and on the memory storage device, then system responsiveness is improved, but unsafe shutdowns and power cycling issues occur
Solution Approach 1:
The patent implements a feedback mechanism where the power controller continuously monitors the storage device's operational status and power state. Before commanding the power gate to cut off power, the power controller receives confirmation from the storage controller that shutdown operations are complete. This feedback loop ensures that rapid power cycling does not result in unsafe shutdowns, maintaining both system responsiveness and device stability
Data Source
AI summary
A power control method for a memory storage device and a memory storage system are provided. The method includes configuring a power controller in a host system, controlling, by the power controller, a power gate disposed between the host system and the memory storage device, and controlling a power supply of the memory storage device from the host system by the power gate, wherein the power gate is not controlled by a Basic Input Output System (BIOS) controller of the host system.