Host Program Address Space Access Check for Non-Running Processors

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Solution Overview

Problem

In multi-processor systems, determining whether a logical processor has access to an address space is inefficient when the processor is not running, as it often requires waking the processor to relinquish access, leading to unnecessary resource allocation and reduced system throughput.

Innovation Solution

A method where a host program issues a conditional interrupt to check if a target logical processor has access to a target address space without requiring the processor to be running, by checking stored information and determining access status without waking non-running processors, thus avoiding unnecessary transitions into interpretive execution mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a host program wakes a non-running logical processor to determine address space access, then access status can be determined, but system throughput decreases and resource allocation increases unnecessarily

Engineering Contradiction:
Improveaddress space access determinationVSAvoidsystem throughput
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The system maintains pre-computed access status information in host memory that indicates whether a logical processor has access to an address space before the processor is actually run. When determining access status, the host program checks this pre-stored information rather than waking the processor, thus resolving the contradiction by having the access determination information prepared in advance.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If a non-running logical processor is woken to relinquish address space access, then address space can be de-allocated, but unnecessary resource allocation occurs

Engineering Contradiction:
Improvesystem throughputVSAvoidresource allocation
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The system uses pre-computed and stored access status information that allows the host program to determine whether a logical processor has address space access without needing to wake or activate the processor. The processor effectively serves the system's information needs passively through the pre-computed data, eliminating unnecessary wake/sleep transitions and associated resource allocation.

Inventive Principle:
Principle #25Self-service

3Productivity

If the host program checks processor status information, then access determination becomes efficient, but additional information management is required

Engineering Contradiction:
Improveaccess determination efficiencyVSAvoidinformation management system
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system introduces an intermediary data structure (access status information stored in host memory) that mediates between the logical processor and the host program's address space management. This intermediary contains pre-computed access status that simplifies the determination process, while the complexity of maintaining this information is managed through automated updates during processor activation and address space allocation events.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7650469B2Determining whether a non-running processor has access to an address space
Publication Date: 2010.01.19 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US7650469B2 patent drawing
  • US7650469B2 patent drawing
  • US7650469B2 patent drawing

AI summary

A method is provided for determining whether a logical processor of an information processing system has access to an address space of the information processing system. An instruction is issued by a first processor, the instruction referencing a target logical processor and a target address space. In response to the instruction, first information is checked to determine whether the target logical processor is running. When it is determined that the target logical processor is not running, second information is checked by a host program to determine whether the target logical processor has access to the target address space.