Host Reliability Manager for Dynamic Memory System Control

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Solution Overview

Problem

Current memory systems, such as SSDs, face reliability issues due to bit errors, leading to performance degradation and quality of service (QoS) problems, particularly with SCSI errors being the most common, which affect the stability and efficiency of data storage.

Innovation Solution

A data processing system with a reliability manager that analyzes data characteristics to determine and apply appropriate reliability schemes, including error correction code (ECC), read retry, intra redundancy, and refresh schemes, to enhance memory system reliability and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory systems use traditional fixed reliability management, then system stability is maintained, but reliability performance and quality of service deteriorate due to bit errors and SCSI errors

Engineering Contradiction:
Improvememory system reliabilityVSAvoidperformance and quality of service
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements dynamic reliability management by allowing the host system to adjust reliability schemes based on data characteristics and system state. The reliability manager dynamically selects and configures reliability parameters (such as ECC levels, refresh rates, and read retry attempts) rather than using fixed settings, enabling the system to adapt reliability management to actual operational needs and improve both reliability and performance simultaneously.

Inventive Principle:
Principle #15Dynamics

2Productivity

If no reliability management is applied, then performance is maximized, but bit errors and SCSI errors increase leading to reliability degradation

Engineering Contradiction:
ImproveperformanceVSAvoidreliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes reliability parameters dynamically based on data characteristics. The host system analyzes data patterns and adjusts reliability parameters such as error correction code strength, refresh intervals, and read retry thresholds. This parameter adjustment allows the system to optimize performance by reducing unnecessary reliability overhead while maintaining adequate reliability protection when needed.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If comprehensive reliability schemes are applied to all memory systems, then reliability is improved, but system complexity and resource overhead increase

Engineering Contradiction:
ImprovereliabilityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies reliability schemes locally based on data characteristics rather than uniformly across all memory operations. The reliability manager analyzes specific data patterns and applies appropriate reliability measures only where needed, such as applying stronger error correction to critical data or increasing refresh rates for recently written data. This selective approach reduces overall system complexity while maintaining necessary reliability.

Inventive Principle:
Principle #3Local quality

4Reliability

If dynamic reliability management is implemented, then reliability and performance are improved, but control and measurement complexity increases

Engineering Contradiction:
ImprovereliabilityVSAvoidcontrol complexity
Core Design Contradiction:
ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent implements feedback mechanisms where the reliability manager continuously monitors memory system performance and error rates, then adjusts reliability schemes accordingly. The system measures actual reliability outcomes and uses this feedback to optimize reliability parameter settings dynamically. This feedback loop simplifies control by using measured performance data to automatically adjust settings rather than requiring complex manual control.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11354188B2Data processing system including host with reliability management of memory systems and method for the same
Publication Date: 2022.06.07 SK HYNIX INC
  • US11354188B2 patent drawing
  • US11354188B2 patent drawing
  • US11354188B2 patent drawing

AI summary

A host handles reliability management of memory systems. The host analyzes characteristics of data associated with a select memory system among the memory systems. The host determines a reliability control mode and one or more reliability schemes among reliability schemes to be applied to the select memory system based on the characteristics. The host provides reliability management information indicating the reliability control mode to the select memory system. The plurality of reliability schemes includes error correction code (ECC), read retry, intra redundancy and refresh schemes.