Host Storage Memory Hierarchy for Swap Thrashing Reduction

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Solution Overview

Problem

Computing systems experience overhead and thrashing phenomena due to frequent swap operations between volatile and nonvolatile memory devices when the size of temporary data exceeds the storage capacity of the DRAM.

Innovation Solution

A computing system architecture that utilizes a host with a CPU and a first volatile memory device, along with a storage device containing a second volatile memory device and a nonvolatile memory device, where the CPU uses both volatile memory devices as main memory, and a swap controller moves pages between these devices to manage storage capacity and reduce thrashing by swapping out less frequently accessed pages to a nonvolatile swap area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the OS uses DRAM as main memory to store temporary data, then the CPU can access data quickly, but the storage capacity is limited and frequent swap operations cause thrashing

Engineering Contradiction:

Improvedata access speedVSAvoidstorage capacity

Core Design Contradiction:

SpeedVSQuantity of substance

Solution Approach 1:

The memory system is segmented into three distinct parts: host DRAM (first volatile memory), storage device DRAM (second volatile memory), and storage device non-volatile memory. This segmentation allows the system to differentiate between frequently accessed data (host DRAM), temporarily stored data (storage device DRAM), and persistent storage (non-volatile memory), resolving the contradiction between speed and capacity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The storage device is nested within the host system, with the storage device DRAM nested within the storage device. The CPU accesses host DRAM for frequent operations, while the storage device DRAM acts as an intermediate layer that can be accessed by both CPU and storage controller, creating a nested memory hierarchy that expands capacity without sacrificing access speed.

Inventive Principle:

Principle #7Nested doll (Nesting)

2Quantity of substance

If the OS performs swap operations to move data between DRAM and storage device, then the storage capacity is expanded, but data exchange between host and storage device causes overhead and thrashing

Engineering Contradiction:

Improvestorage capacityVSAvoidswap operation overhead

Core Design Contradiction:

Quantity of substanceVSLoss of energy

Solution Approach 1:

The storage device DRAM acts as an intermediary buffer between the host DRAM and the non-volatile memory. When the host needs to expand storage capacity, data is first moved to the storage device DRAM (which has higher bandwidth than non-volatile memory), and then the storage controller manages swaps within the storage device internally, reducing the number of cross-host-storage data exchanges.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The storage device performs swap operations internally between its own DRAM and non-volatile memory without requiring continuous host intervention. The storage controller autonomously manages the swap process, allowing the system to self-regulate memory usage and reduce overhead by eliminating the need for frequent host-storage data exchanges.

Inventive Principle:

Principle #25Self-service

3Device complexity

If the CPU uses only host DRAM as main memory, then the system structure is simple, but the storage capacity is insufficient for large temporary data

Engineering Contradiction:

Improvememory system structureVSAvoidstorage capacity

Core Design Contradiction:

Device complexityVSQuantity of substance

Solution Approach 1:

The storage device is designed with multi-functionality: it serves as both a storage device for persistent data and as an additional main memory (second volatile memory) that can be accessed by the CPU. This universal design allows the same component to provide both storage capacity expansion and enhanced memory performance without significantly increasing system complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory architecture transitions from a single-dimensional hierarchy (host DRAM only) to a multi-dimensional structure with three memory levels: host DRAM (fast, small), storage device DRAM (fast, medium), and non-volatile memory (slow, large). This dimensional expansion allows the system to accommodate large temporary data while maintaining access speed through the intermediate storage device DRAM layer.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11204797B2Computing systems and methods of operating computing systems

Publication Date: 2021.12.21 SAMSUNG ELECTRONICS CO LTD

AI summary

A computing system includes a host and a storage device. The host includes a central processing unit (CPU) and a first volatile memory device. The storage device includes a second volatile memory device and a nonvolatile memory device. The CPU uses the first volatile memory device and the second volatile memory device as a main memory to store temporary data used for operation of the CPU. The CPU determines a swap-out page to be swapped-out of first pages stored in the first volatile memory device, determines a swap-in page to be swapped-in of second pages stored in the second volatile memory device, and exchanges the swapped-out page and the swapped-in page.