Hot Address Detection for Nonvolatile Memory Wear Leveling

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Solution Overview

Problem

Nonvolatile memory devices face reduced lifespan due to uneven distribution of write operations, leading to premature deterioration of specific memory cells, as conventional wear leveling methods are inadequate in managing hot addresses effectively.

Innovation Solution

A semiconductor device with a media controller and a hot address detector that outputs addresses, updates metadata, and adjusts a list to detect and manage hot addresses, thereby performing wear leveling operations by redistributing write operations across memory cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If write requests are concentrated on a specific memory cell, then write operation speed is improved, but the lifetime of the memory device is shortened

Engineering Contradiction:
Improvewrite operation speedVSAvoidmemory device lifetime
Core Design Contradiction:
SpeedVSDuration of action of stationary object

Solution Approach 1:

The patent performs wear leveling operations at predetermined intervals before memory cells reach their write limit. The media controller detects hot addresses and proactively remaps them to different physical locations, preventing concentration of write operations on any single cell and extending overall device lifetime while maintaining write performance

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent dynamically changes the mapping relationship between logical addresses and physical addresses based on write operation patterns. By altering the physical location mappings periodically and selectively (particularly for hot addresses), the system distributes wear across all memory cells while preserving fast access to frequently written data

Inventive Principle:
Principle #35Parameter changes

2Reliability

If conventional wear leveling is performed at regular intervals, then memory cell wear is distributed, but hot address detection and management is inadequate

Engineering Contradiction:
Improvewear distribution uniformityVSAvoidhot address management capability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent implements a feedback mechanism where the media controller monitors write operation patterns, identifies hot addresses based on access frequency and wear metrics, and dynamically adjusts remapping decisions. This adaptive feedback loop enables targeted wear leveling for hot addresses while maintaining uniform wear distribution across all cells

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent segments the wear leveling process into general wear leveling for all addresses and specialized hot address management. By separating these functions and applying different strategies to different address types, the system achieves both uniform wear distribution and adaptive hot address optimization

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10713159B2Semiconductor device for managing wear leveling operation of a nonvolatile memory device
Publication Date: 2020.07.14 SK HYNIX INC
  • US10713159B2 patent drawing
  • US10713159B2 patent drawing
  • US10713159B2 patent drawing

AI summary

A semiconductor device may include a media controller configured to output an address in response to receiving a write request for writing to a nonvolatile memory. The semiconductor device may also include a hot address detector. The hot address detector is configured to store a list including the address output from the media controller and including meta data related to the address, to update the meta data according to the address output from the media controller, to determine whether the address output from the media controller is a hot address, and to adjust a length of the list.