Hotspot Root Cause Extraction for Semiconductor Lithography
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Solution Overview
Problem
As circuit components shrink in size and feature spacing decreases, identifying and addressing hotspots in semiconductor manufacturing becomes increasingly difficult, leading to defects and manufacturing issues despite advanced techniques like RETs and DFM.
Innovation Solution
A method for hotspot root cause determination involving feature value analysis, population ratio calculation, and decision chain processes to identify design and process-related features causing hotspots, allowing for design and process adjustments to mitigate these issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If circuit component size is reduced and feature spacing is decreased, then circuit integration density is improved, but manufacturing precision deteriorates due to lithographic errors and hotspots
Solution Approach 1:
The patent performs lithography simulation and hotspot identification during the design phase, before actual manufacturing. This preliminary analysis allows designers to identify and correct potential lithographic errors and hotspots in the layout design, preventing manufacturing defects before they occur. The system calculates lithographic patterns, identifies hotspot layout regions, and determines root causes ahead of time, enabling pre-correction of design issues that would otherwise cause manufacturing failures at scaled dimensions.
2Length of moving object
If feature size is reduced, then device miniaturization is achieved, but defect rate increases due to increased sensitivity to lithographic errors
Solution Approach 1:
The patent implements a feedback mechanism where lithography simulation results and hotspot identification information are fed back into the design process. The system analyzes simulated lithographic patterns, identifies regions with high defect probability (hotspots), and provides this information back to designers for layout modification. This closed-loop feedback allows continuous improvement of design robustness against lithographic variations, maintaining reliability even as feature sizes are reduced.
3Device complexity
If design complexity is increased to accommodate smaller features, then integration density improves, but difficulty of detecting and measuring hotspots increases
Solution Approach 1:
The patent introduces lithography simulation as an intermediary tool between the physical layout design and the actual manufacturing process. Instead of directly analyzing complex physical layouts for hotspots, the system uses simulation software to create virtual lithographic patterns and identify hotspot regions. This intermediary simulation layer simplifies the detection process by translating complex design features into observable lithographic outcomes, making hotspot identification more manageable despite increasing design complexity.
Data Source
AI summary
Various aspects of the present disclosed technology relate to techniques for hotspot root cause determination. Feature values for a plurality of design/process-related features for each of the layout regions of interest on a layout design are determined. Population ratios for feature value ranges for each of the plurality of design/process-related features are determined based on a number of layout regions of interest having feature values within each of the feature value ranges. Hotspot feature repeater values are determined. Based on the population ratios and the hotspot feature repeater values, a root cause analysis can be performed to determine one or more design/process-related features that are most likely causes for each of a plurality of hotspot layout regions. The information of the one or more design/process-related features can be used to identity other hotspot regions and adjust the layout design or to adjust a manufacturing process.