HP93K Tester FPGA Programming via SVF Conversion
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Solution Overview
Problem
Current semiconductor testing systems require separate computer systems and vendor-supplied programming pods to program FPGAs, which are costly, prone to temperature-related failures, and can be restricted by IA mandates, leading to inefficiencies and increased maintenance needs.
Innovation Solution
A method to convert Serial Vector Format (SVF) files into HP93K vectors, allowing the HP93K tester to generate JTAG signals and program FPGAs directly, eliminating the need for external computers and programming pods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a vendor programming pod is used to program FPGAs during testing, then the FPGA can be programmed with bitstreams, but the programming pod breaks down prematurely due to exposure to extreme temperatures
Solution Approach 1:
The patent extracts the programming function from the external vendor programming pod and relocates it to the HP93K tester itself. By converting SVF files to HP93K vectors and using the tester's existing JTAG interface, the programming capability is integrated into the testing system, eliminating the need for the external programming pod that cannot withstand extreme temperatures.
Solution Approach 2:
The HP93K tester is enhanced to perform multiple functions: both electrical testing and FPGA programming. By adding vector conversion capabilities and utilizing the existing JTAG interface for programming operations, the tester becomes a multi-functional device that eliminates the need for separate programming hardware.
2Ease of manufacture
If a separate computer system with vendor software is used to program FPGAs, then the FPGA can be programmed, but the system complexity and cost increase
Solution Approach 1:
The patent merges the programming function into the HP93K tester by integrating SVF to HP93K vector conversion capabilities. This consolidation eliminates the need for separate computer systems and vendor software, reducing system complexity while maintaining full programming functionality through the existing JTAG interface.
Solution Approach 2:
The HP93K tester performs the programming operation itself using its own processing resources to convert SVF files to HP93K vectors and generate the necessary JTAG signals. This self-service approach eliminates dependency on external computer systems and vendor-specific programming software.
3Reliability
If IA mandates prohibit Ethernet or serial port connections between the HP93K workstation and additional computer, then security is improved, but the ability to automate FPGA programming is lost
Solution Approach 1:
The patent extracts the programming automation capability from the external computer system and relocates it to the HP93K tester. By performing vector conversion and programming operations locally on the tester, the solution eliminates the need for Ethernet or serial port connections between the workstation and external computers, maintaining both security and automation.
Solution Approach 2:
The HP93K tester autonomously performs the programming automation functions by converting SVF files to HP93K vectors and executing programming operations using its own processing resources. This self-service capability maintains full automation while eliminating restricted network connections.
Data Source
AI summary
Provided is a method for enabling a semiconductor test system for testing field programmable gate arrays (FPGAs) to operate as a device programmer by converting a serial vector format (SVF) file containing a bitstream and converting the file to a vector compatible with the semiconductor test system. When executed on an HP93K test system, as an example, the vector generates JTAG (Joint Test Action Group) signals, which program the bitstream into a Field Programmable Gate Array (FPGA). The inventive method eliminates the need for a separate computer system that is normally required to run FPGA programming software and also eliminates the need to use FPGA vendor provided JTAG programming pods. Eliminating the need for the vendor software, a separate computer system, and programming pods reduces equipment cost, maintenance, and streamlines the electrical test, evaluation, and characterization of FPGAs.


