Host Performance Booster Memory Access Management via Device Side Table Encoding
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Solution Overview
Problem
The management of accessing Flash memory devices is complex, and existing solutions often lead to insufficient RAM storage capacity, introducing additional problems, necessitating a novel method for memory access management in Host Performance Booster (HPB) architectures that minimizes side effects.
Innovation Solution
A method utilizing device side table information encoding and decoding within a memory controller, where internal information is encoded and sent to a host device for storage, and address mapping control tables are generated and stored in RAM, allowing for reliable physical address determination and data retrieval based on logical addresses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If device side table information is stored in host device memory, then RAM storage capacity requirements are reduced, but data security and reliability are compromised due to potential outdated or altered information
Solution Approach 1:
The patent applies preliminary action by encoding the device side table information before transmitting it to the host device. The memory controller encodes the original table information using a hardware engine circuit, generating encoded result data that is then sent to the host device for storage. This preliminary encoding ensures that even if the host device stores the information, it cannot be easily altered or corrupted, maintaining data integrity while allowing the host to participate in storage operations.
Solution Approach 2:
The patent introduces an intermediary mechanism through the hardware engine circuit that performs encoding and decoding operations. This intermediary transforms the original table information into encoded form before host storage, and subsequently decodes it when needed for address mapping. This intermediary layer protects the data security while enabling the host device to store and transmit the information, resolving the contradiction between reduced RAM requirements and maintained data reliability.
2Reliability
If complex access management procedures are implemented, then data security is improved, but system complexity and processing overhead increase
Solution Approach 1:
The patent applies self-service by implementing the encoding and decoding functions within the memory controller's hardware engine circuit. The system performs these security-critical operations automatically without requiring complex external management procedures. The hardware engine circuit self-manages the encoding of table information before host storage and the subsequent decoding for address mapping, reducing the need for complex access management procedures while maintaining data security.
Solution Approach 2:
The patent replaces complex software-based access management procedures with hardware-level encoding and decoding operations. The hardware engine circuit performs cryptographic-style encoding and decoding natively in hardware, which is more efficient and secure than software implementations. This substitution reduces system complexity by moving security functions to dedicated hardware circuits rather than complex software management systems.
3Reliability
If encoding and decoding operations are performed, then data integrity is ensured, but processing time and computational overhead increase
Solution Approach 1:
The patent applies preliminary action by performing the encoding operation in advance when the device side table information is initially created or updated. The hardware engine circuit encodes the table information before it is transmitted to the host device for storage. This preliminary encoding ensures data integrity is established upfront, and the encoded information can be stored and transmitted without repeated processing, reducing overall processing time during normal operations.
Solution Approach 2:
The hardware engine circuit provides self-service by performing encoding and decoding operations automatically as part of the normal data flow. The encoding happens automatically when table information is generated, and decoding occurs automatically when address mapping is needed. This automated self-service approach minimizes manual intervention and reduces processing overhead compared to systems that require complex verification and validation procedures at each access point.
Data Source
AI summary
A method and apparatus for performing access management of a memory device in a Host Performance Booster (HPB) architecture with aid of device side table information encoding and decoding are provided. The method may include: encoding internal information of the memory device and sending encoded result thereof to a host device, to allow the host device to store the encoded result in a memory within the host device as host-owned encoded device side table information at the host device; generating and storing multiple entries of address mapping control table into a RAM as at least one portion of device side table information at the memory device; decoding partial information of the host-owned encoded device side table information, performing checking operation on decoded result thereof, and selectively using the decoded result to determine physical address associated with logical address; and reading data from the NV memory according to the physical address.