Hardware Performance Counter Anomaly Detection for Side-Channel Attacks
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Solution Overview
Problem
Current systems face challenges in efficiently detecting side-channel attacks using hardware performance counters (HPCs) due to the large number of counters generating excessive data, necessitating a method to identify a reliable subset that consistently indicates such attacks.
Innovation Solution
A machine learning-based approach that conducts time-series analysis of HPC data to develop anomaly detection models, selecting a subset of HPCs demonstrating anomalous behavior during side-channel attacks, which can be used for runtime detection without requiring operating system modifications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large number of hardware performance counters are used to detect side-channel attacks, then detection reliability is improved, but data processing complexity and overhead increase
Solution Approach 1:
The patent extracts and selects a specific subset of hardware performance counters from the complete set of available counters. The selection process identifies counters that specifically exhibit anomalous behavior during side-channel attacks, removing unnecessary counters from the monitoring set. This reduces the volume of data requiring analysis while maintaining reliable attack detection capability.
Solution Approach 2:
The patent applies local quality by assigning different roles to different performance counters based on their specific characteristics. Rather than uniformly monitoring all counters, the system identifies and focuses on specific counters (such as those related to cache line operations, memory access patterns, or branch prediction) that demonstrate localized sensitivity to side-channel attack conditions, thereby improving detection efficiency.
2Measurement precision
If all hardware performance counters are monitored continuously, then detection precision is improved, but processor overhead increases
Solution Approach 1:
The system extracts only the essential performance counters that are directly relevant to detecting side-channel attacks, eliminating the need to continuously monitor all available counters. This selective approach maintains precise attack detection by focusing on counters with high discriminative power while reducing the processing burden on the system.
Solution Approach 2:
The patent implements partial monitoring by continuously tracking only a selected subset of performance counters rather than all counters. This partial action approach provides sufficient information for accurate attack detection without the excessive overhead of comprehensive monitoring, achieving an optimal balance between precision and performance.
3Adaptability or versatility
If a comprehensive set of hardware performance counters is used, then adaptability to different attack types is improved, but system complexity increases
Solution Approach 1:
The patent implements a universal subset of performance counters that can detect multiple types of side-channel attacks including Spectre, Meltdown, and other cache-based attacks. The selected counters serve multiple detection purposes simultaneously, providing broad attack type coverage while maintaining a manageable system complexity through their multi-functional capability.
Solution Approach 2:
The system adapts to different attack types by monitoring changes in the behavior patterns of the selected performance counters. Rather than requiring different counter sets for different attacks, the same subset of counters exhibits different anomalous behavior patterns depending on the attack type, allowing the system to adaptively detect various threats through parameter analysis.
Data Source
AI summary
The present disclosure is directed to systems and methods of detecting a side-channel attack using hardware counter anomaly detection circuitry to select a subset of HPCs demonstrating anomalous behavior in response to a side-channel attack. The hardware counter anomaly detection circuitry includes data collection circuitry to collect data from a plurality of HPCs, time/frequency domain transform circuitry to transform the collected data to the frequency domain, one-class support vector anomaly detection circuitry to detect anomalous or aberrant behavior by the HPCs. The hardware counter anomaly detection circuitry selects the HPCs having reliable and consistent anomalous activity or behavior in response to a side-channel attack and groups those HPCs into a side-channel attack detection HPC sub-set that may be communicated to one or more external devices.