HPC Switch Dynamic Latency Clustering for Packet Distribution
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Solution Overview
Problem
High Performance Computing (HPC) switches face performance drops due to fixed target controllers, busy conditions, inadequate network strength, memory issues, and host channel adapter problems, leading to delayed or failed Inter Process Communication (IPC) message delivery and increased downtime.
Innovation Solution
The HPC switch optimizes data packet distribution by assigning destination Virtual Lanes based on service level information and dynamically determining latency thresholds, classifying ports into primary and secondary clusters, and transmitting data packets through low-latency clusters while using acknowledgement key-packets for high-latency clusters, with packets stored in Direct Memory Access (DMA) for reassignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If target controllers are fixed for any given IB connection, then connection stability is improved, but message transmission reliability deteriorates when controllers are busy or connections are weak
Solution Approach 1:
The patent implements dynamic path selection where the HPC switch continuously monitors controller status and connection quality, then adapts the message routing path in real-time. Instead of fixed target controllers, the system dynamically selects optimal controllers based on current system state, resolving the contradiction between connection stability and transmission reliability.
Solution Approach 2:
The system changes the parameter of controller selection from static (fixed) to dynamic (based on real-time conditions). By monitoring parameters such as controller busy status and connection strength, the system adjusts the target controller selection to optimize message transmission reliability while maintaining connection stability through controlled adaptation.
2Productivity
If controllers prioritize IOPS transactions, then storage performance is improved, but IPC message delivery reliability deteriorates
Solution Approach 1:
The patent segments the controller's processing capabilities into different priority queues: one for IOPS transactions and another for IPC message delivery. This segmentation allows the controller to handle storage performance-critical IOPS operations while dedicating specific resources and time slots to IPC message delivery, ensuring both functions can operate reliably without one compromising the other.
Solution Approach 2:
The HPC switch acts as an intermediary that buffers and manages IPC messages before they reach the controllers. It implements a message queueing mechanism that decouples the timing of message sending from message processing, allowing controllers to prioritize IOPS while the switch ensures IPC messages are delivered reliably through coordinated scheduling and retry mechanisms.
3Speed
If the HPC switch transmits all data packets through low-latency ports, then message transmission speed is improved, but device complexity increases
Solution Approach 1:
The patent implements partial optimization by transmitting only critical time-sensitive messages through low-latency ports, while allowing non-critical messages to use standard ports. This partial action approach achieves speed improvement for essential communications without requiring all switch infrastructure to be optimized, thereby limiting the increase in device complexity to only what is necessary for high-speed paths.
Data Source
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AI summary
The present subject matter relates generally to optimization of distribution of data packets in a High Performance Computing (HPC) switch. The HPC switch receives data packets from controllers communicatively connected to HPC switch, through interconnected Queue Pair (QP) lanes and assigns a destination virtual lane (VL) for each data packet based on service level information. Further, the HPC switch generates plurality of clusters of ports that are coupled with each interconnected VL based on latency determined dynamically for each port. Finally, the HPC switch transmits a first group of data packets through ports belonging to a primary cluster of plurality of clusters and transmits acknowledgement key-packet associated with second group of data packets through the ports belonging to secondary clusters of plurality of clusters, based on destination VL assigned for each data packet to other controllers for optimizing the distribution of the plurality of data packets in the HPC switch.