Hardware Performance Monitors for Adaptive Voltage Scaling
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Solution Overview
Problem
Modern System-on-a-Chip (SoC) integrated circuits with multiple threshold voltage (VT) logic libraries face challenges in accurately implementing adaptive voltage scaling due to varying delay behaviors across different VT libraries, making it difficult to model and predict operating points, especially near the design target point where any cell library can form a critical path.
Innovation Solution
The implementation of a system that uses a plurality of Hardware Performance Monitors (HPMs), each associated with a specific VT logic library, to measure performance differences and provide signals to an Advanced Power Controller (APC) for adaptive voltage scaling, ensuring accurate voltage adjustments across different VT domains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single Hardware Performance Monitor is used for adaptive voltage scaling, then the system is simpler to implement, but it cannot accurately model performance variations across multiple VT logic libraries
Solution Approach 1:
The single HPM is segmented into multiple separate HPMs, with each HPM dedicated to monitoring a specific VT logic library. This segmentation allows each monitor to accurately capture performance characteristics of its assigned library without interference from other libraries, thereby improving measurement precision while maintaining manageable system complexity through modular architecture
Solution Approach 2:
Each HPM is tailored with local quality by being specifically designed to monitor a particular VT logic library's performance characteristics. This local specialization enables accurate detection of process and temperature variations specific to each library, allowing the APC to make precise voltage adjustments for each domain
2Measurement precision
If multiple Hardware Performance Monitors are used for each VT logic library, then performance measurement accuracy improves, but system complexity increases
Solution Approach 1:
The monitoring function is segmented by assigning one HPM per VT logic library, creating independent monitoring units that can be individually optimized for their specific libraries while contributing to the overall system performance
Solution Approach 2:
Each HPM is designed with universal applicability within its domain, capable of monitoring process corner and temperature variations for its assigned VT library across different operating conditions. This multi-functionality allows the system to handle multiple libraries using a standardized HPM architecture
3Device complexity
If adaptive voltage scaling does not account for VT library variations, then power management is simpler, but power consumption cannot be optimized
Solution Approach 1:
The system implements feedback mechanisms where each HPM continuously monitors performance characteristics of its assigned VT library and provides this information to the APC. The APC uses this feedback to dynamically adjust voltages in real-time, optimizing power consumption by adapting to actual library performance variations rather than using fixed voltage tables
Solution Approach 2:
The power management system transitions from static voltage tables to dynamic voltage adjustment. The APC continuously adapts voltages based on real-time HPM data, allowing the system to optimize power consumption dynamically as process corners and temperatures change, rather than relying on pre-determined voltage values
4Use of energy by moving object
If closed loop feedback is used for adaptive voltage scaling, then power consumption is reduced, but system delay increases due to feedback measurement
Solution Approach 1:
The HPMs perform preliminary measurements of performance characteristics continuously, preparing data about process corners and temperature variations before voltage adjustments are needed. This preliminary action allows the APC to make faster voltage decisions based on pre-collected intelligence, reducing the effective feedback delay
Data Source
AI summary
A system and method is disclosed for providing a plurality of hardware performance monitors for adaptive voltage scaling in an integrated circuit system that comprises a plurality of threshold voltage VT logic libraries. Each hardware performance monitor is associated with one of the plurality of threshold voltage VT logic libraries and provides a signal that measures a performance of its respective threshold voltage VT logic library die temperature, process corner and supply voltage. The difference between the measured performance and a nominal expected performance for each hardware performance monitor is determined. The largest of the plurality of difference signals is selected and provided to an advanced power controller for use in providing adaptive voltage scaling for the integrated circuit system.