Hardware Transactional Memory Concurrency Control

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Solution Overview

Problem

Conventional database management systems face inefficiencies in concurrency control due to the overhead of locking-based methods, especially when using coarse granularity locks, which can drastically reduce performance by blocking access to large memory blocks and incurring significant memory and processor overhead.

Innovation Solution

Implementing hardware transactional memory (HTM) based concurrency control, which allows transactions to be performed optimistically without locks, detecting conflicts and rolling back changes, and switching to a fallback mode with locks when necessary, with the threshold for optimistic attempts determined by expected workload and available resources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If locking-based concurrency control is used, then transaction consistency is maintained, but system performance deteriorates due to blocking access to large memory blocks and incurring significant memory and processor overhead

Engineering Contradiction:
Improvetransaction consistencyVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies fine-grained locking at the cache line level instead of coarse-grained locking at the memory block level. Each cache line is independently tracked and locked, allowing multiple transactions to proceed concurrently on different cache lines without blocking each other, thus resolving the contradiction between consistency and performance

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent replaces the traditional software-based locking mechanism with hardware transactional memory (HTM) support. The hardware level provides atomicity and conflict detection, eliminating the need for complex software lock management and reducing processor overhead while maintaining transaction consistency

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If optimistic transaction performance is used without locks, then system performance improves by reducing overhead, but transaction reliability worsens due to potential conflicts between concurrent transactions

Engineering Contradiction:
Improvesystem performanceVSAvoidtransaction consistency
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the system continuously monitors for conflicts between concurrent transactions at the cache line level. When a conflict is detected (e.g., two transactions trying to write to the same cache line), the system rolls back the conflicting transaction and retries, thus maintaining reliability while preserving high performance during conflict-free execution

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent dynamically adjusts the threshold quantity of optimistic attempts based on workload characteristics and system state. By adapting the retry threshold parameter, the system optimizes the balance between performance (fewer attempts) and reliability (more attempts), resolving the contradiction under varying operational conditions

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If coarse granularity locks are used, then implementation simplicity is maintained, but device complexity increases due to blocking access to large memory blocks and managing lock states across multiple transactions

Engineering Contradiction:
Improveimplementation simplicityVSAvoidlock management complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent segments the memory space into cache lines, each with its own lock state. This fine-grained segmentation simplifies lock management by isolating conflicts to minimal units, preventing a single lock from blocking entire memory blocks, and reducing the complexity of tracking and managing lock states across multiple transactions

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11947994B2Adaptive hardware transactional memory based concurrency control
Publication Date: 2024.04.02 SAP SE
  • US11947994B2 patent drawing
  • US11947994B2 patent drawing
  • US11947994B2 patent drawing

AI summary

A method may include determining a threshold quantity of attempts to optimistically perform a first transaction operating data stored in a database. The threshold quantity of attempts may be determined based on an expected workload of the first transaction and/or a workload at the database. The first transaction may be performed optimistically including by tracking cache lines accessed by the first transaction and detecting, based on a second transaction writing to a cache line accessed by the first transaction, a conflict between the first transaction and the second transaction. If the first transaction is not successful performed after the threshold quantity of attempts to optimistically perform the first transaction, the first transaction may be performed in a fallback mode including by acquiring a lock to prevent the second transaction from accessing a same data in the database as the first transaction. Related systems and articles of manufacture are also provided.