Capacitor Type Humidity Sensor 3D Stacking Parasitic Reduction
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Solution Overview
Problem
Capacitive humidity sensors face challenges in minimizing size and manufacturing costs while maintaining accuracy, as existing designs often suffer from parasitic capacitance and dispersion issues due to the placement of reference capacitors.
Innovation Solution
The solution involves positioning a reference capacitor, such as an MIM or PIP capacitor, under the sensing capacitor on different planes, with a dielectric layer made of a different material, to reduce size and manufacturing costs, and minimize parasitic capacitance effects, allowing for improved accuracy and design flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the reference capacitor is disposed on the same plane as the sensing capacitor, then the manufacturing process is simpler, but the chip area increases and parasitic capacitance affects measurement accuracy
Solution Approach 1:
The reference capacitor is moved from the same plane (2D layout) to a different plane (3D stacking), specifically forming it in a lower layer while the sensing capacitor occupies the upper layer. This vertical arrangement reduces horizontal chip area occupation while maintaining electrical connection simplicity through via structures.
2Ease of manufacture
If the reference capacitor is disposed on the same plane as the sensing capacitor, then the manufacturing process is simpler, but parasitic capacitance increases and reduces measurement accuracy
Solution Approach 1:
The reference capacitor is extracted from the sensing region plane and positioned in a separate lower layer, physically isolating it from the sensing capacitor. This separation eliminates parasitic capacitance coupling between the reference and sensing electrodes that would occur if they were coplanar, thereby improving measurement accuracy.
3Quantity of substance
If a larger capacitor structure is used to ensure adequate capacitance values, then the capacitance measurement range is improved, but the device size increases
Solution Approach 1:
By stacking capacitors vertically on different planes rather than arranging them horizontally on the same plane, the patent achieves adequate capacitance values without increasing the horizontal device footprint. The vertical stacking allows sufficient electrode area for capacitance while confining the structure within a smaller planar area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration results in a smaller humidity sensor with reduced manufacturing costs and enhanced accuracy by isolating the reference capacitor from the sensing capacitor, thereby minimizing parasitic capacitance and process dispersion, leading to more reliable humidity measurements.
Implementation Method 1
a humidity sensitive layer for sensing humidity may be present inside the device, and the permittivity of the humidity sensitive layer may change when moisture is introduced through the humidity sensitive layer
Implementation Method 2
a capacitor type device having a humidity sensitive material such as polymer or ceramic absorbs moisture, which has permittivity that is changed in the presence of moisture
Implementation Method 3
a reference capacitor configured to provide a reference capacitance value
Implementation Method 4
The feedback capacitor may be configured to accumulate a charge that corresponds to capacitance differences (Cs−Cr) generated in the sensing capacitor and the reference capacitor
Data Source
AI summary
A capacitor type humidity sensor may include a semiconductor substrate comprising a humidity sensing region and a peripheral circuit region, a sensing capacitor disposed on the humidity sensing region and the sensing capacitor comprising a humidity sensitive layer, a dielectric layer made of a material different than from the humidity sensitive layer, and a reference capacitor configured to provide a reference capacitance value, wherein the sensing capacitor and the reference capacitor are disposed on different planes from each other. A reference capacitor is disposed at an arbitrary region under a sensing capacitor among a humidity sensing region or at a peripheral circuit region. The reference capacitor is a metal-insulator-metal (MIM) capacitor or a polysilicon-insulator-polysilicon (PIP) capacitor.