HV JFET P-Type Top Layer Surface Leakage Control

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Solution Overview

Problem

High voltage junction field effect transistors face challenges in preventing surface leaking currents and achieving optimal breakdown voltage due to limitations in existing semiconductor technologies.

Innovation Solution

Incorporating a P-type top layer above the channel between the drain and source, which helps in preventing surface leaking currents and reducing breakdown voltage by controlling the depletion region and using a specific manufacturing method to form the transistor structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a high voltage junction field effect transistor is designed without a P type top layer, then the device structure is simpler, but surface leaking current increases and breakdown voltage decreases

Engineering Contradiction:

Improvebreakdown voltageVSAvoidtransistor structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

A P type top layer is added specifically above the channel region to provide localized electrical field control and prevent surface leaking current, while maintaining simpler structure in other regions of the transistor

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The transistor structure combines multiple semiconductor materials including P type top layer, N type well, P type well, and intrinsic or lightly-doped channel region to achieve optimal electrical characteristics for high voltage operation

Inventive Principle:

Principle #40Composite materials

2Reliability

If a P type top layer is added to prevent surface leaking current, then reliability improves, but manufacturing process complexity increases

Engineering Contradiction:

Improvesurface leaking current preventionVSAvoidmanufacturing process

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The P type top layer is formed early in the manufacturing process through ion implantation or in-situ doping, establishing the protective electrical field configuration before subsequent processing steps

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The doping concentration and depth of the P type top layer are precisely controlled during manufacturing to optimize its effectiveness in preventing surface leaking current while maintaining compatibility with standard fabrication processes

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The P-type top layer effectively prevents surface leaking currents and enhances the breakdown voltage of high voltage junction field effect transistors, enabling them to operate efficiently in high voltage applications.

Implementation Method 1

The size of a depletion region is controlled by the voltage of the gates, such that the channel can be pitched off and turned off

Methodology Applied

Scientific EffectDepletion region: Electric Field

Data Source

PatentUS9024365B2High voltage junction field effect transistor and manufacturing method thereof

Publication Date: 2015.05.05 MACRONIX INTERNATIONAL CO LTD

AI summary

A high voltage junction field effect transistor and a manufacturing method thereof are provided. The high voltage junction field effect transistor includes a base, a drain, a source and a P type top layer. The drain and the source are disposed above the base. A channel is formed between the source and the drain. The P type top layer is disposed above the channel.