High-Voltage MOSFET Trench Segmentation for Voltage Endurance
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Solution Overview
Problem
High-voltage metal-oxide-semiconductor field-effect transistors in integrated circuits are prone to damage when exposed to high voltages, limiting the miniaturization and reliability of power circuits.
Innovation Solution
A high-voltage metal-oxide-semiconductor field-effect transistor design featuring a substrate with an epitaxial layer, doped regions, trenches with oxide and nitride layers, and a metal layer, which provides enhanced voltage resistance by optimizing trench depth, oxide layer thickness, and doping concentration to maintain low electric conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If metal-oxide-semiconductor field-effect transistors are manufactured as integrated circuits, then operation speed and voltage signal processing performance are improved, but voltage endurance deteriorates when exposed to high voltage
Solution Approach 1:
The device is segmented into multiple regions including a first region with a first conductivity type and a second region with a second conductivity type opposite to the first. This segmentation allows different regions to handle different voltage levels, enabling the transistor to withstand high voltage while maintaining fast operation speed in the integrated circuit configuration.
Solution Approach 2:
Different regions of the transistor are assigned different doping concentrations and conductivity types. The first region has a first doping concentration and the second region has a second doping concentration different from the first. This local quality differentiation enables the transistor to achieve both high-speed operation and high voltage endurance by optimizing each region's electrical properties for its specific function.
2Reliability
If power circuits are designed to withstand high voltage, then voltage endurance is improved, but circuit size increases
Solution Approach 1:
The transistor structure is divided into multiple doped regions with alternating conductivity types arranged in a compact configuration. This segmentation allows the high voltage handling capability to be achieved through vertical and lateral doping profiles rather than increasing the overall device area, enabling miniaturization of power circuits.
Solution Approach 2:
The invention utilizes both lateral and vertical dimensions for doping region arrangement. The first and second doped regions are positioned in different spatial locations with different conductivity types, creating a three-dimensional doping structure that achieves high voltage endurance without proportionally increasing the planar circuit area.
Data Source
AI summary
A high-voltage metal-oxide-semiconductor field-effect transistor applied to a high-voltage range includes a substrate, an epitaxial layer, a plurality of first doped regions, a plurality of first trenches, a plurality of second trenches, a plurality of second doped regions, and a metal layer. The epitaxial layer is disposed on the substrate and used as a drain electrode. The plurality of first doped regions are disposed in the epitaxial layer. The plurality of first trenches are disposed on the plurality of doped regions in a spaced manner. Each of the first trenches has a first trench oxide layer and a first semiconductor layer which is connected to a source electrode. The plurality of second trenches are disposed between each of the first trenches in a spaced manner. Each of the second trenches has a second trench oxide layer and a second semiconductor layer which is connected to a gate electrode.