High Voltage Semiconductor Device Mask Layer Ion Implantation

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Solution Overview

Problem

Integrating function circuit modules with different operating voltage ranges into a single semiconductor chip is challenging due to the complexity and high cost of the CMOS transistor fabricating process, which results in unsatisfactory device stability for high voltage metal-oxide-semiconductor devices.

Innovation Solution

A method for fabricating a high voltage semiconductor device involves forming a substrate with active zones, using multiple mask layers for precise ion implantation to create doped regions and gate conductor structures, reducing the number of photo masks needed and enhancing device stability by controlling dopant distribution and mask layer configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the CMOS transistor fabricating process is used to integrate circuit modules with different operating voltage ranges, then the integration capability is improved, but the device complexity and fabricating cost increase significantly

Engineering Contradiction:

Improveintegration capabilityVSAvoidfabricating process complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The substrate is divided into multiple active zones (first active zone and second active zone) with different doping types, allowing different circuit modules with different voltage requirements to be integrated separately in each zone while using a unified fabricating process

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A unified ion implantation process is designed to serve multiple functions: forming doped regions in different active zones, creating field regions, and establishing grade regions, thereby replacing the need for multiple separate CMOS fabricating steps

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If the CMOS transistor fabricating process is used to integrate circuit modules with different operating voltage ranges, then the integration capability is improved, but the fabricating cost increases

Engineering Contradiction:

Improveintegration capabilityVSAvoidfabricating cost

Core Design Contradiction:

Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

Multiple ion implantation steps that would traditionally require separate photo masks are merged into a single ion implantation process by strategically designing the mask layer openings to expose different regions at different stages, reducing the number of photo masks required

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The mask layer is pre-configured with specific opening patterns before ion implantation to define the exact regions that need doping, eliminating the need for additional photo mask steps during the implantation process

Inventive Principle:

Principle #10Preliminary action

3Reliability

If the conventional DDD HV NMOS device structure is used, then the high voltage function is achieved, but the device stability is unsatisfactory

Engineering Contradiction:

Improvehigh voltage functionVSAvoiddevice stability

Core Design Contradiction:

ReliabilityVSStability of the object's composition

Solution Approach 1:

Different active zones are assigned different doping types (first active zone with first polarity, second active zone with second polarity) and different doping concentrations, allowing each zone to be optimized for its specific function while maintaining overall device stability

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The doping concentration and polarity parameters are varied across different regions of the substrate, with the first ion implantation process using first doping parameters and the second ion implantation process using second doping parameters, to achieve both high voltage capability and device stability

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the fabricating process, reduces the number of photo masks required, and improves the stability of high voltage semiconductor devices by optimizing dopant distribution and mask layer designs, addressing the integration challenges and stability issues of existing methods.

Implementation Method 1

a first ion implantation process is performed to dope the substrate through the first opening and the second opening by using the first mask layer as an implantation mask layer

Methodology Applied

Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS8742498B2High voltage semiconductor device and fabricating method thereof

Publication Date: 2014.06.03 UNITED MICROELECTRONICS CORP

AI summary

A method for fabricating a high voltage semiconductor device is provided. Firstly, a substrate is provided, wherein the substrate has a first active zone and a second active zone. Then, a first ion implantation process is performed to dope the substrate by a first mask layer, thereby forming a first-polarity doped region at the two ends of the first active zone and a periphery of the second active zone. After the first mask layer is removed, a second ion implantation process is performed to dope the substrate by a second mask layer, thereby forming a second-polarity doped region at the two ends of the second active zone and a periphery of the first active zone. After the second mask layer is removed, a first gate conductor structure and a second gate conductor structure are formed over the middle segments of the first active zone and the second active zone, respectively.