High Voltage Transfer Circuit Using Depletion-Type Transistors
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Solution Overview
Problem
Conventional high voltage transfer circuits in flash memory devices face issues such as breakdown phenomena and leakage current due to low breakdown voltage of PMOS transistors and the difficulty in generating high DC bias voltages, which increase current consumption and chip size.
Innovation Solution
A high voltage transfer circuit utilizing depletion-type transistors to connect a high voltage transistor to both the boosted voltage and output node, with a driver circuit that applies a threshold voltage to the transistor gate when inactive, preventing breakdown and eliminating the need for external bias voltage by tracking the source voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high-voltage PMOS transistor is used as a switch to transfer boosted voltage, then the circuit can control high voltage, but the low breakdown voltage between drain and source causes breakdown phenomenon when voltage difference is large
Solution Approach 1:
A level shifter circuit is introduced as an intermediary between the boosted voltage source and the high-voltage PMOS transistor. The level shifter transfers the boosted voltage to the gate of the PMOS transistor, ensuring that the voltage difference between drain and source does not exceed the breakdown voltage threshold, thereby preventing breakdown phenomenon while maintaining high voltage transfer capability.
2Reliability
If an external DC bias voltage higher than boosted voltage is applied to the gate of high voltage transistor to transfer boosted voltage when switch is ON, then high voltage can be transferred, but it increases current consumption and requires external bias voltage generation
Solution Approach 1:
The level shifter circuit is designed to automatically generate the appropriate gate voltage for the high-voltage PMOS transistor using only the available boosted voltage, without requiring external DC bias voltage. The circuit self-regulates to provide the necessary voltage levels, eliminating the need for external bias voltage generation and reducing overall system complexity.
3Reliability
If high voltage transistor is used to control boosted voltage, then high voltage transfer is enabled, but leakage current occurs when the transistor is turned OFF
Solution Approach 1:
The level shifter acts as an intermediary that precisely controls the gate voltage of the high-voltage PMOS transistor. When the transistor is turned OFF, the level shifter ensures the gate voltage is properly adjusted to maintain adequate voltage difference between gate and source/drain terminals, thereby minimizing leakage current while preserving switching control functionality.
Data Source
AI summary
Embodiments of the invention provide a high voltage transfer circuit, a row decoder circuit comprising the high voltage transfer circuit, and a non-volatile semiconductor memory device comprising the high voltage transfer circuit. In one embodiment, the invention provides a high voltage transfer circuit of a semiconductor memory device comprising a high voltage switch comprising a high voltage transistor comprising a first terminal connected to a boosted voltage via a first depletion-type transistor and comprising a second terminal connected to an output node via a second depletion-type transistor. The high voltage transfer circuit further comprises a driver circuit adapted to drive the first and second depletion-type transistors and the high voltage transistor in response to an input signal.