High Voltage Transistor Gate Structure Using Metal Work Function
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Solution Overview
Problem
Conventional methods for manufacturing high voltage transistors are inefficient due to the need for multiple photolithographic masking steps, leading to high manufacturing costs and reduced production throughput, while also facing issues with boron penetration and depletion effects that affect device performance.
Innovation Solution
A method involving the formation of a high voltage transistor using a substrate with a thermal oxide layer, where at least two thermal oxidation processes create a thick dielectric layer with a small portion protruding over the substrate, allowing for a simplified metal gate replacement process and simultaneous formation of both high and low voltage transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional poly-silicon gate is used, then device structure is simple, but boron penetration and depletion effect occur which reduces gate capacitance and driving force
Solution Approach 1:
The patent changes the material parameter of the gate electrode from conventional poly-silicon to work function metals (such as tungsten, molybdenum, or their nitrides). This material substitution eliminates boron penetration and depletion effects while maintaining electrical performance, directly resolving the contradiction between structural simplicity and device reliability.
2Reliability
If multiple photolithographic masking steps are used to manufacture high voltage transistor, then device performance requirements are met, but manufacturing cost increases and production throughput decreases
Solution Approach 1:
The patent merges the formation of high voltage and low voltage transistors into a single integrated process flow. By using a common substrate preparation sequence including thermal oxidation, recess formation, and gate structure fabrication, the patent eliminates the need for separate photolithographic masking steps for different transistor types, thereby maintaining performance requirements while significantly improving manufacturing efficiency.
Solution Approach 2:
The patent creates a universal process methodology that can manufacture both high voltage and low voltage transistors using the same sequence of steps. The gate structure formation process serves multiple functions: it creates the control electrode for high voltage transistors, defines the channel region for low voltage transistors, and establishes the reference plane for subsequent source/drain region formation, thereby reducing the total number of required process steps.
3Manufacturing precision
If thick dielectric layer is formed with large portion protruding over substrate, then gate oxide layer can be formed, but metal gate replacement process becomes difficult
Solution Approach 1:
The patent applies local quality by forming the dielectric layer with differential heights: a first portion that protrudes over the substrate to enable gate oxide formation, and a second portion that is substantially coplanar with the substrate to facilitate metal gate replacement. This localized variation in dielectric layer topology allows each region to serve its specific function optimally.
Solution Approach 2:
The patent segments the dielectric layer into distinct portions with different topographies. The first portion extends beyond the substrate edge to provide adequate surface area for gate oxide deposition, while the second portion remains coplanar with the substrate to enable proper alignment and formation of the metal gate structure, thus resolving the conflict between gate oxide formation requirements and metal gate replacement ease.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs and increases production throughput by simplifying the process, improving device performance by minimizing boron penetration and depletion effects, and ensuring high gated diode breakdown voltage characteristics.
Implementation Method 1
forming a thermal oxide layer on the substrate... using at least two thermal oxidation processes to form the thick first dielectric layer
Data Source
AI summary
A method for forming a high voltage transistor is provided. First, a substrate having a top surface is provided, following by forming a thermal oxide layer on the substrate. At least a part of the thermal oxidation layer is removed to form a recess in the substrate, wherein a bottom surface of the recess is lower than the top surface of the substrate. A gate oxide layer is formed in the recess, then a gate structure is formed on the gate oxide layer. The method further includes forming a source/drain region in the substrate.