High-Voltage Transistor Termination Structure for Breakdown Control

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Solution Overview

Problem

High voltage transistors in integrated chips face breakdown issues due to high electric fields, which can damage the device substrate and isolation structures, especially when conductive vias are proximal to the drain or source regions, leading to reduced breakdown voltage capabilities.

Innovation Solution

A conductive termination structure is implemented on the handle substrate between the conductive via and the drain region, comprising a contact region within the third well region and a conductive gate electrode overlying the second interface between the second and third well regions, which attenuates electric field strength along the device substrate surface, thereby increasing the breakdown voltage capability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If conductive via is placed proximal to drain or source regions for compact layout, then device area is reduced, but breakdown voltage capability deteriorates due to high electric field damage

Engineering Contradiction:
Improvedevice areaVSAvoidbreakdown voltage capability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

A conductive termination structure is introduced as an intermediary element positioned between the conductive via and the drain region. This termination structure acts as a mediator that redistributes and attenuates the electric field, preventing direct high-field interaction between the via and drain region, thereby maintaining both compact layout and high breakdown voltage capability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The harmful high electric field effect is extracted and isolated from the critical drain region by introducing the termination structure. The termination structure absorbs and dissipates the electric field stress, effectively removing the damaging influence from the high voltage transistor operation

Inventive Principle:
Principle #2Taking out (Extraction)

2Power

If high voltage transistor operates at high breakdown voltage for power handling, then power amplification capability is improved, but electric field-induced damage to substrate and isolation structures increases

Engineering Contradiction:
Improvepower handling capabilityVSAvoidelectric field-induced damage
Core Design Contradiction:
PowerVSObject-affected harmful factors

Solution Approach 1:

The conductive termination structure converts the harmful high electric field into a beneficial field distribution pattern. By strategically positioning the termination structure, the electric field is redirected and distributed in a manner that maintains high voltage operation while preventing localized breakdown and damage to the substrate and isolation structures

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The conductive termination structure effectively mitigates electric field-induced damage, enhancing the breakdown voltage and performance of high voltage transistors by reducing electric field strength at critical regions, thus improving the reliability and efficiency of the integrated chip.

Implementation Method 1

conductive termination structure... which attenuates electric field strength along the device substrate surface

Methodology Applied
Scientific EffectElectric field attenuation: Electric Field

Data Source

PatentUS20240321894A1Breakdown voltage capability of high voltage device
Publication Date: 2024.09.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240321894A1 patent drawing
  • US20240321894A1 patent drawing
  • US20240321894A1 patent drawing

AI summary

Various embodiments of the present disclosure are directed towards an integrated chip. The integrated chip includes a first well region, a second well region, and a third well region disposed within a semiconductor substrate. The second well region is disposed between the first and second well regions. A first source/drain region is in the first well region. A second source/drain region is in the second well region. A gate structure is on the semiconductor substrate and spaced laterally between the first and second source/drain regions. A contact region is disposed in the third well region. A conductive structure is on the semiconductor substrate and spaced laterally between the second source/drain region and the contact region.